Patents by Inventor John J. Williams

John J. Williams has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7480308
    Abstract: Packets and packets fragments possibly received out of sequence are distributed into an expandable set of queues. For each particular packet or fragment, a queue within a set of queues is identified that does not contain a packet or packet fragment that is subsequent to the particular packet or fragment, and the particular packet or fragment is enqueued therein. If there is not such a queue available, a new queue is added to the set of queues. A data structure is typically updated for packet fragments to identify when all fragments have been received and the order of queues containing the packet fragments in order of their position within the reassembled packet. This ordered list of the queues is communicated to a reassembly mechanism to retrieve the packet fragments and to reassemble the packet. Resequencing of packets is similarly performed, and may be part of the reassembly process.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: January 20, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Earl T. Cohen, John Andrew Fingerhut, John J. Williams, Jr.
  • Patent number: 7441101
    Abstract: The present invention provides a multithreaded processor, such as a network processor, that fetches instructions in a pipeline stage based on feedback signals from later stages. The multithreaded processor comprises a pipeline with an instruction unit in the early stage and an instruction queue, a thread interleaver, and an execution pipeline in the later stages. Feedback signals from the later stages cause the instruction unit to block fetching, immediately fetch, raise priority, or lower priority for a particular thread. The instruction queue generates a queue signal, on a per thread basis, responsive to a thread queue condition, etc., the thread interleaver generates an interleaver signal responsive to a thread condition, etc., and the execution pipeline generates an execution signal responsive to an execution stall, etc.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: October 21, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Donald E. Steiss, Earl T Cohen, John J Williams, Jr.
  • Publication number: 20080181229
    Abstract: Sequences of items may be maintained using ordered locks. These items may correspond to anything, but using ordered locks to maintain sequences of packets, especially for maintaining requisite packet orderings when distributing packets to be processed to different packet processing engines, may be particularly useful. For example, in response to a particular packet processing engine completing processing of a particular packet, a gather instruction is attached to the particular identifier of a particular ordered lock associated with the particular packet. If no longer needed for further processing, the packet processing engine is immediately released to be able to process another packet or perform another function. The gather instruction is typically performed in response to the particular ordered lock being acquired by the particular identifier, with the gather instruction causing the processed particular packet to be sent.
    Type: Application
    Filed: April 3, 2008
    Publication date: July 31, 2008
    Applicant: Cisco Technology, Inc. a corporation of California
    Inventors: John J. Williams, John Andrew Fingerhut, Doron Shoham, Shimon Listman
  • Patent number: 7362762
    Abstract: Sequences of items may be maintained using ordered locks. These items may correspond to anything, but using ordered locks to maintain sequences of packets, especially for maintaining requisite packet orderings when distributing packets to be processed to different packet processing engines, may be particularly useful. For example, in response to a particular packet processing engine completing processing of a particular packet, a gather instruction is attached to the particular identifier of a particular ordered lock associated with the particular packet. If no longer needed for further processing, the packet processing engine is immediately released to be able to process another packet or perform another function. The gather instruction is performed in response to the particular ordered lock being acquired by the particular identifier, with the gather instruction causing the processed particular packet to be sent.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: April 22, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: John J. Williams, Jr., John Andrew Fingerhut, Doron Shoham, Shimon Listman
  • Patent number: 7360064
    Abstract: The present invention provides a network multithreaded processor, such as a network processor, including a thread interleaver that implements fine-grained thread decisions to avoid underutilization of instruction execution resources in spite of large communication latencies. In an upper pipeline, an instruction unit determines an instruction fetch sequence responsive to an instruction queue depth on a per thread basis. In a lower pipeline, a thread interleaver determines a thread interleave sequence responsive to thread conditions including thread latency conditions. The thread interleaver selects threads using a two-level round robin arbitration. Thread latency signals are active responsive to thread latencies such as thread stalls, cache misses, and interlocks. During the subsequent one or more clock cycles, the thread is ineligible for arbitration. In one embodiment, other thread conditions affect selection decisions such as local priority, global stalls, and late stalls.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: April 15, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Donald Steiss, Earl T Cohen, John J Williams, Jr.
  • Patent number: 7269139
    Abstract: Methods and apparatus are disclosed for an adaptive rate control mechanism reactive to flow control messages in a packet switching system and other communications and computer systems. Typically, a multiplicative increase and exponential decrease technique is used to throttle traffic. Backpressure feedback is used to calculate the initial rate at which to allow traffic after backpressure is deasserted. This reduces the probability of underrun of buffers (e.g., too little traffic being carried). The adjustment to the initial rate is made by measuring the time between the XON and XOFF in factor periods. Then a target XON time is subtracted. If the result is positive (i.e., the measured XON time was too long), the rate is multiplicatively increased (e.g., by a factor of two to the difference). If the result is negative (i.e., the measured XON time was too short), the rate is exponentially decreased (e.g., by the square root).
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: September 11, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: John J. Williams, Jr., Thomas Dejanovic
  • Patent number: 7051259
    Abstract: Methods and apparatus are disclosed for communicating time and latency sensitive information in a system, such as, but not limited to a computer or communications system. A first block of data is identified and transmitted. A check code is partially determined based on this first data. While the first data is being transmitted, the time-sensitive data (e.g., flow control, other control information, etc.) is identified. This identified time-sensitive data is then contiguously transmitted after the first data. The determination of the check code is completed based on the time-sensitive data, and the check code is contiguously transmitted after the time-sensitive data. One implementation receives the first data, the time-sensitive data, and the check code. If error correction is being used and is needed, the time-sensitive data is first corrected based on the check code, and then subsequently, the first data is corrected. In this manner, the latency of the availability of this time-sensitive data may be reduced.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: May 23, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: John J. Williams, Jr., Thomas Dejanovic
  • Patent number: 7046627
    Abstract: Traffic information is accumulated and flow control information distributed in a packet switching system. Traffic information is collected in multiple elements, which forward in a coordinated fashion to collecting elements indications of congestion and other types of information. The collecting elements manipulate the received indications and generate flow control messages which are sent to individual sending components of the packet switching system. In one implementation, a switching element maintains for each destination a count of packets within itself which are addressed to the particular destination. An indication of a portion of this collected information is included in a packet header forwarded from each of the elements each packet time. Each of the elements are assigned a different offset, such that they send an indication of a different portion of their collected information, so a view of the traffic conditions and/or buffer occupancies within a packet switching system is efficiently produced.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: May 16, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Thomas Dejanovic, Anurag Singh Maunder, John J. Williams, Jr.
  • Patent number: 7030382
    Abstract: A method of calibrating detectors in a detector ring of a PET scanner, each detector including a plurality of crystals, the PET scanner having a field of view, is disclosed. The method comprises collecting timing data indicative of coincidence events occurring between each pair of crystals within the field of view. The method further comprises determining a detector adjustment value for each detector, determining a crystal adjustment value for each crystal in each detector, and discretizing the crystal adjustment value for each crystal to produce a discretized crystal adjustment value for each crystal. Lastly, the method comprises calibrating each detector by applying the discretized crystal adjustment value for each crystal in each detector to the collected timing data indicative of coincidence events.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: April 18, 2006
    Assignee: General Electric Company
    Inventors: John J. Williams, Dershan Luo, Mark K. Limkeman, Michael J. Cook, David L. McDaniel, Edwin L. Oswalt, Mark P. Feilen
  • Patent number: 7016305
    Abstract: Methods and apparatus are disclosed for distributing flow control information in a packet switching system. In one packet switching system, flow control information is collected in a data structure in the first stage switching elements. Each of these switching elements transmit data from the flow control data structure as small messages or in fields included in packets being sent across multiple statically allocated paths. Flow control information is received by next stage elements, which are programmed to forward only flow control information received from a limited number of components or over a limited number of paths. The first stage switching elements may also periodically or occasionally delay sending flow control information or send a dummy message or information to accommodate bandwidth transmission differences between components of the packet switching system, including to accommodate bandwidth variations caused by plesiochronous timing across the network.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: March 21, 2006
    Assignee: Cisco Technology, Inc
    Inventors: Jonathan E. Michelson, John J. Williams, Jr., Thomas Dejanovic
  • Patent number: 7009976
    Abstract: Methods and apparatus are disclosed for using barrier phases to synchronize processes and components in a packet switching system, including, for example, but not limited to the use of barrier phases in the coordinated timing of the sending of information (e.g., flow control information) within a packet switching system, and the use of barrier phases in a packet sequence number windowing protocol. In one implementation, elements are assigned to one of multiple ordered sets of a barrier groups, wherein each element of a barrier group must be set to a common barrier state before any element of a next a barrier group can switch to a next barrier state, and once all elements of a particular barrier group switch to a new barrier state, all the elements of the next barrier group begin to switch to the next barrier state.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: March 7, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Jonathan E. Michelson, John J. Williams, Jr., Thomas Dejanovic, John Andrew Fingerhut
  • Patent number: 6967926
    Abstract: Methods and apparatus are disclosed for using barrier phases to limit the disorder of packets which may be used in a computer or communications system. In one packet switching system, source nodes include an indication of their current barrier state in sent packets. For each barrier state, a predetermined range of sequence numbers may be used or a predetermined number of packets may be sent by a source node. The source, destination, and switching nodes are systematically switched between barrier phases, which is typically performed continuously in response to the flow of barrier request and barrier acknowledgement packets or signals. Each source node broadcasts to all forward connected nodes a barrier request to change to a next barrier state. After a switching node has received a barrier request on all incoming links, the switching node propagates the barrier request.
    Type: Grant
    Filed: December 31, 2000
    Date of Patent: November 22, 2005
    Assignee: Cisco Technology, Inc.
    Inventors: John J. Williams, Jr., Thomas Dejanovic, Jonathan E. Michelson
  • Patent number: 6852978
    Abstract: A method of calibrating detectors in a detector ring of a PET scanner, each detector including a plurality of crystals, the PET scanner having a field of view, is disclosed. The method comprises collecting timing data indicative of coincidence events occurring between each pair of crystals within the field of view. The method further comprises determining a detector adjustment value for each detector, determining a crystal adjustment value for each crystal in each detector, and discretizing the crystal adjustment value for each crystal to produce a discretized crystal adjustment value for each crystal. Lastly, the method comprises calibrating each detector by applying the discretized crystal adjustment value for each crystal in each detector to the collected timing data indicative of coincidence events.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: February 8, 2005
    Assignee: General Electric Company
    Inventors: John J. Williams, Dershan Luo, Mark K. Limkeman, Michael J. Cook, David L. McDaniel, Edwin L. Oswalt, Mark P. Feilen
  • Patent number: 6739751
    Abstract: An x-ray alignment and measurement process including an x-ray source and a detection array. The detection array allows for the taking of images having a precisely known pixel size and location. Disposed between the x-ray source and the detection array is an object having a known size or position. The object is then imaged and the location and size of the object on the image can be determined and compared to the actual size or location. The calculation is performed on the multiple pixels in the image to mathematically determine the remaining unknown object location or size. For alignment purposes, any error in the location or size of the object can thus be corrected.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: May 25, 2004
    Assignee: GE Medical Systems Global Technology Company, LLC
    Inventor: John J. Williams
  • Publication number: 20040084625
    Abstract: A method of calibrating detectors in a detector ring of a PET scanner, each detector including a plurality of crystals, the PET scanner having a field of view, is disclosed. The method comprises collecting timing data indicative of coincidence events occurring between each pair of crystals within the field of view. The method further comprises determining a detector adjustment value for each detector, determining a crystal adjustment value for each crystal in each detector, and discretizing the crystal adjustment value for each crystal to produce a discretized crystal adjustment value for each crystal. Lastly, the method comprises calibrating each detector by applying the discretized crystal adjustment value for each crystal in each detector to the collected timing data indicative of coincidence events.
    Type: Application
    Filed: October 31, 2002
    Publication date: May 6, 2004
    Inventors: John J. Williams, Dershan Luo, Mark K. Limkeman, Michael J. Cook, David L. McDaniel, Edwin L. Oswalt, Mark P. Feilen
  • Publication number: 20020146093
    Abstract: An x-ray alignment and measurement process including an x-ray source and a detection array. The detection array allows for the taking of images having a precisely known pixel size and location. Disposed between the x-ray source and the detection array is an object having a known size or position. The object is then imaged and the location and size of the object on the image can be determined and compared to the actual size or location. The calculation is performed on the multiple pixels in the image to mathematically determine the remaining unknown object location or size. For alignment purposes, any error in the location or size of the object can thus be corrected.
    Type: Application
    Filed: April 10, 2001
    Publication date: October 10, 2002
    Inventor: John J. Williams
  • Patent number: 6189187
    Abstract: A clip is disclosed herein which is composed of a resilient material and comprises a body having the following elements as in a relaxed state: opposing first and second ends, of which the first end is open to define a first slot, and the second end is closed; a first aperture adjacent to and communicating with the first slot, the first slot having a width less than the diameter of the first aperture; a second aperture adjacent to the second end; and a second slot extending between and communicating with the first and second apertures, the second slot having a width less than the respective diameters of the first and second apertures. The body of the clip is capable of deformation to temporarily increase the widths of the first and second slots for (i) receiving a pair of elongated member portions (i.e. electric cord portions) in respective first and second apertures, and for (ii) removing the clip from such elongated member portions.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: February 20, 2001
    Inventor: John J. Williams
  • Patent number: 5534763
    Abstract: A method of controlling the commutation of power to an electric motor back EMF sensing or Hall effect sensors is disclosed. At least part of the current waveform is sensed in at least one motor winding and is used to establish information relating to the appropriate commutation pattern required to commutate power to the motor and control motor parameters e.g. motor speed.
    Type: Grant
    Filed: December 19, 1991
    Date of Patent: July 9, 1996
    Assignee: Fisher & Paykel Limited
    Inventors: John J. A. Williams, Christian J. W. Gianni
  • Patent number: 5418535
    Abstract: A radar indicator comprising a source of radar image signals having a first (r,.theta.) format and a digital scan converter responsive to the radar image signals for converting the radar image signals from the first format to digital radar image signals having a second (X-Y) format. The digital scan converter includes an image memory for supplying the digital radar image signals having the second (X-Y) format. A source of external video image signals having the second format, including video synchronization signals is provided. A synchronization signal stripper and clock signal generator circuit is responsive to the video synchronization signals of the external video image signals for generating a clock signal synchronized with the synchronization signals of the external video image signals.
    Type: Grant
    Filed: October 25, 1993
    Date of Patent: May 23, 1995
    Assignee: Cardion, Inc.
    Inventors: Carmine Masucci, Menachem Cohen, John J. Williams
  • Patent number: 5378893
    Abstract: A PET scanner contains a positron emission event qualifier which prevents noise from being misinterpreted as such an event. A radiation detector signal indicates the intensity and duration of sensed gamma radiation. A comparator produces an intermediate signal when the radiation detector signal exceeds a predetermined threshold. A delay line delays the intermediate signal by an interval of time and blocks any pulses in the intermediate signal which are shorter than this interval. Typical noise in the intermediate signal is shorter in duration than this interval of time.
    Type: Grant
    Filed: October 26, 1993
    Date of Patent: January 3, 1995
    Assignee: General Electric Company
    Inventors: Jonathan A. Murray, John J. Williams