Patents by Inventor John Jerico Manuel CUSTODIO

John Jerico Manuel CUSTODIO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10749615
    Abstract: There are included an error signal generation unit that generates an error signal for adding a burst error to each of an MSB and an LSB of the PAM4 signal in units of clock cycles, an error addition unit that performs an exclusive OR operation on the MSB and the LSB and the error signal and outputs bit strings obtained as a result of the operation, and a calculation unit that calculates the minimum number of clock cycles required for realizing a bit error rate of a desired test signal and the number of burst errors to be added to the MSB and the LSB during a period of the minimum number of the clock cycles.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: August 18, 2020
    Assignee: ANRITSU CORPORATION
    Inventors: Hisao Kidokoro, John Jerico Manuel Custodio
  • Publication number: 20200235828
    Abstract: There are included an error signal generation unit that generates an error signal for adding a burst error to each of an MSB and an LSB of the PAM4 signal in units of clock cycles, an error addition unit that performs an exclusive OR operation on the MSB and the LSB and the error signal and outputs bit strings obtained as a result of the operation, and a calculation unit that calculates the minimum number of clock cycles required for realizing a bit error rate of a desired test signal and the number of burst errors to be added to the MSB and the LSB during a period of the minimum number of the clock cycles.
    Type: Application
    Filed: October 28, 2019
    Publication date: July 23, 2020
    Inventors: Hisao KIDOKORO, John Jerico Manuel CUSTODIO