Patents by Inventor John Jesse Higgins

John Jesse Higgins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7276775
    Abstract: Damascene or non-damascene processing when used with a method that includes (a) forming a mask having an opening therethrough on a structure, said opening having sidewalls; (b) implanting an inhibiting species into said structure through the opening so as to form an inhibiting region in said structure; and (c) growing a dielectric layer on the structure in said opening, wherein the inhibiting region partially inhibits growth of the dielectric layer is capable of forming a semiconductor structure, e.g., MOSFET or anti-fuse, including a dual thickness dielectric layer. Alternatively, the dual thickness dielectric can be formed by replacing the inhibiting species mentioned above with a dielectric growth enhancement species which forms an enhancing region in the structure which aids in the growth of the dielectric layer.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: October 2, 2007
    Assignee: International Business Machines Corporation
    Inventors: Claude Louis Bertin, Anthony J. Dally, John Atkinson Fifield, John Jesse Higgins, Jack Allan Mandelman, William Robert Tonti, Nicholas Martin van Heel
  • Publication number: 20030109090
    Abstract: Damascene or non-damascene processing when used with a method that includes (a) forming a mask having an opening therethrough on a structure, said opening having sidewalls; (b) implanting an inhibiting species into said structure through the opening so as to form an inhibiting region in said structure; and (c) growing a dielectric layer on the structure in said opening, wherein the inhibiting region partially inhibits growth of the dielectric layer is capable of forming a semiconductor structure, e.g., MOSFET or anti-fuse, including a dual thickness dielectric layer. Alternatively, the dual thickness dielectric can be formed by replacing the inhibiting species mentioned above with a dielectric growth enhancement species which forms an enhancing region in the structure which aids in the growth of the dielectric layer.
    Type: Application
    Filed: December 26, 2002
    Publication date: June 12, 2003
    Applicant: International Business Machines Corporation
    Inventors: Claude Louis Bertin, Anthony J. Dally, John Atkinson Fifield, John Jesse Higgins, Jack Allan Mandelman, William Robert Tonti, Nicholas Martin van Heel
  • Patent number: 6531410
    Abstract: Damascene or non-damascene processing when used with a method that includes (a) forming a mask having an opening therethrough on a structure, said opening having sidewalls; (b) implanting an inhibiting species into said structure through the opening so as to form an inhibiting region in said structure; and (c) growing a dielectric layer on the structure in said opening, wherein the inhibiting region partially inhibits growth of the dielectric layer is capable of forming a semiconductor structure, e.g., MOSFET or anti-fuse, including a dual thickness dielectric layer. Alternatively, the dual thickness dielectric can be formed by replacing the inhibiting species mentioned above with a dielectric growth enhancement species which forms an enhancing region in the structure which aids in the growth of the dielectric layer.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: March 11, 2003
    Assignee: International Business Machines Corporation
    Inventors: Claude Louis Bertin, Anthony J. Dally, John Atkinson Fifield, John Jesse Higgins, Jack Allan Mandelman, William Robert Tonti, Nicholas Martin van Heel
  • Publication number: 20020119637
    Abstract: Damascene or non-damascene processing when used with a method that includes (a) forming a mask having an opening therethrough on a structure, said opening having sidewalls; (b) implanting an inhibiting species into said structure through the opening so as to form an inhibiting region in said structure; and (c) growing a dielectric layer on the structure in said opening, wherein the inhibiting region partially inhibits growth of the dielectric layer is capable of forming a semiconductor structure, e.g., MOSFET or anti-fuse, including a dual thickness dielectric layer. Alternatively, the dual thickness dielectric can be formed by replacing the inhibiting species mentioned above with a dielectric growth enhancement species which forms an enhancing region in the structure which aids in the growth of the dielectric layer.
    Type: Application
    Filed: February 27, 2001
    Publication date: August 29, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claude Louis Bertin, Anthony J. Dally, John Atkinson Fifield, John Jesse Higgins, Jack Allan Mandelman, William Robert Tonti, Nicholas Martin van Heel