Patents by Inventor John K. Chu

John K. Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Crack resistant passivation layer
    Patent number: 5936301
    Abstract: A method for making a device and the device itself which utilizes a passivation layer displaying improved crack resistance is disclosed. This is accomplished through the incorporation of boron into a PSG passivation layer. The temperature of the passivation deposition may need to be kept to a temperature low enough so that the boron compound used for the boron source does not decompose prior to reacting with other reactacts.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: August 10, 1999
    Assignee: Intel Corporation
    Inventor: John K. Chu
  • Crack resistant passivation layer
    Patent number: 5747389
    Abstract: A method for making a device and the device itself which utilizes a passivation layer displaying improved crack resistance is disclosed. This is accomplished through the incorporation of boron into a PSG passivation layer. The temperature of the passivation deposition may need to be kept to a temperature low enough so that the boron compound used for the boron source does not decompose prior to reacting with other reactants.
    Type: Grant
    Filed: May 26, 1992
    Date of Patent: May 5, 1998
    Assignee: Intel Corporation
    Inventor: John K. Chu
  • Surface planarization method for VLSI technology
    Patent number: 4775550
    Abstract: A planarization process for a double metal very large scale integration (VLSI) technology is disclosed. To compensate for an irregular surface topology encountered in a dielectric medium between the two metals, a CVD dielectric layer and a glass layer are first deposited above the first metal. Then an etch-back process is used to uniformly etch back the CVD dielectric and the glass layers at the same rate, leaving a planarized surface for subsequent deposition of a second dielectric layer and a second metal layer.
    Type: Grant
    Filed: June 3, 1986
    Date of Patent: October 4, 1988
    Assignee: Intel Corporation
    Inventors: John K. Chu, Sanjiv K. Mittal, John T. Orton, Jagir S. Multani, Robert Jecmen