Abstract: A stepped via is formed in a circuit board. Large holes are punched in a predetermined pattern in two insulating sheets and small holes are punched in the same pattern in another insulating sheet. The holes are dimensioned so that their diameters are larger than the thicknesses of their respective sheets. However, the diameters of the larger holes are less than the combined thickness of all sheets. The sheets are juxtaposed so that the sheet with the smaller holes is between the other sheets and corresponding holes from the respective sheets are aligned. The sheets are pressed together to form an integral substrate. Metallization is applied from one side of the substrate, then metallization is applied to the substrate from the other side.

Abstract: A carrier allows a semiconductor die to be flip-chip mounted to a printed wiring board. Many carriers are formed together in an array. A bottom pad constellation formed on one side of a carrier is compatible with the printed wiring board's layout rules. This pad constellation couples to a top pad constellation on the opposing side of the carrier through stepped vias. Conductive bumps made from an alloy of gold and a metal from the platinum family are formed on bond-pads of the die. The top pad constellation of the carrier is formed primarily from gold. The carrier's bottom pad constellation is formed from the gold/platinum alloy. Carriers and dice may be tested by probing the carrier's pad bottom constellation. After testing, solder bumps are formed on the bottom pad constellation, and the carrier is soldered to the printed wiring board.

Abstract: A method of soldering without the use of flux, wherein a plurality of solder bumps are deposited on a first surface and a plurality of solder pad locations are prepared on a second surface. The first and second surfaces are placed immediately adjacent to one another, placing each the plurality of solder bumps in the proximity of a corresponding solder pad location on the second surface. The first surface, the second surface and the solder are placed in a chamber which is evacuated to a low pressure. A plasma is excited within the chamber which heats the first and the second surfaces, thereby heating the plurality of solder bumps and the plurality of solder pad locations by heat conduction and reflowing the plurality of solder bumps on the first surface and on the plurality of solder pad locations on the second surface to form a plurality of solder bonds therebetween.

Abstract: A carrier allows a semiconductor die to be flip-chip mounted to a printed wiring board. Many carriers are formed together in an array. A bottom pad constellation formed on one side of a carrier is compatible with the printed wiring board's layout rules. This pad constellation couples to a top pad constellation on the opposing side of the carrier through stepped vias. Conductive bumps made from an alloy of gold and a metal from the platinum family are formed on bond-pads of the die. The top pad constellation of the carrier is formed primarily from gold. The carrier's bottom pad constellation is formed from the gold/platinum alloy. Carriers and dice may be tested by probing the carrier's pad bottom constellation. After testing, solder bumps are formed on the bottom pad constellation, and the carrier is soldered to the printed wiring board.

Abstract: A reinforced wrap around ground and method includes a substrate, including opposite first and second substrate surfaces separated by a substrate edge. A first metalization layer is coupled to the first substrate surface and a second metalization layer comprising an electrical ground, is coupled to the second substrate surface. An electrical ground reinforcement is coupled between the first metalization layer and the second metalization layer around the substrate edge. Conductive paste coats the electrical ground reinforcement, and the conductive paste is fired to bind the wrap around ground to the substrate and to electrically ground the first metalization layer to the second metalization layer through the electrical ground reinforcement and the conductive coating.

Abstract: A semiconductor assembly which includes a carrier and a semiconductor die is mounted on a printed wiring board. The die includes a top active surface and a bottom active surface. The two active surfaces are non-coplanar. The carrier is made from layers of a ceramic material. Holes are formed through all but one of the layers. The layers are laminated into an integral substrate, and the substrate is fired. The holes form a cavity into but not through the substrate. The number of layers, lamination pressures, and firing parameters are all adjusted in response to the thickness of the die to insure that the height of cavity walls approximately equals the thickness of the die. Continuous metallization is applied in the cavity and on a top surface of the substrate. The die is bonded in the cavity, and conductive bumps are formed on the die and the metallization.

Abstract: A plasma based soldering method which uses a hydrogen-nitrogen gas mixture (5-15% hydrogen) to form a plasma, excited to simultaneously clean and heat solder. Only a relatively low vacuum of about 125 pascal (1 torr) is required. No heat sources beside the plasma are used to reflow the solder and no flux is necessary. Sensitive components can be shielded from plasma ion bombardment and need not be able to withstand the melt temperature of the solder used. The method is suitable for lead-tin solder and can be used to solder polyetherimide baseplates to teflon-glass printed wiring boards at junctions of gold-plated posts and matching gold-plated hole linings.