Patents by Inventor John Kesterson

John Kesterson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260088723
    Abstract: A single-stage multiple-output switching power converter is provided that includes a switch in each output. A secondary controller controls the switches to distribute a secondary winding current to the multiple outputs so as to regulate a different output voltage at each multiple output.
    Type: Application
    Filed: September 25, 2024
    Publication date: March 26, 2026
    Inventors: Yimin Chen, Guoxiong Chen, Yong Li, John Kesterson
  • Patent number: 12506409
    Abstract: A step-down converter is presented. The step down converter includes a power stage having at least one phase, each phase comprising an inductor, a driver, and a clock source. The driver drives the power stage in a synchronous mode or in an asynchronous mode of operation with a minimum off time. When the output voltage approaches the input voltage of the converter, a duty cycle of the converter increases up to a value limited by the minimum off time. The clock source generates a first clock signal having a predefined pulse width. The driver generates a first stretchable clock signal having an adjustable pulse width and an adjustable period. Upon transition from the synchronous mode to the asynchronous mode the driver is configured to increase the adjustable pulse width and the period of the first stretchable clock signal.
    Type: Grant
    Filed: December 26, 2023
    Date of Patent: December 23, 2025
    Assignee: Renesas Design (UK) Limited
    Inventors: Mark Mercer, John Kesterson
  • Publication number: 20250211110
    Abstract: A step-down converter is presented. The step down converter includes a power stage having at least one phase, each phase comprising an inductor, a driver, and a clock source. The driver drives the power stage in a synchronous mode or in an asynchronous mode of operation with a minimum off time. When the output voltage approaches the input voltage of the converter, a duty cycle of the converter increases up to a value limited by the minimum off time. The clock source generates a first clock signal having a predefined pulse width. The driver generates a first stretchable clock signal having an adjustable pulse width and an adjustable period. Upon transition from the synchronous mode to the asynchronous mode the driver is configured to increase the adjustable pulse width and the period of the first stretchable clock signal.
    Type: Application
    Filed: December 26, 2023
    Publication date: June 26, 2025
    Applicant: Renesas Design (UK) Limited
    Inventors: Mark MERCER, John KESTERSON
  • Patent number: 10998818
    Abstract: A multi-level buck converter is provided with seamless transitions back and forth from synchronous to asynchronous low dropout modes of operation.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: May 4, 2021
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: John Kesterson, Aravind Mangudi, James Steele, Mark Mercer
  • Patent number: 10958174
    Abstract: A power converter and method to detect a light load condition at an output of the power converter are presented. The power converter may have an inductor and a resistive element connected between an input of the power converter and an input of the inductor. The power converter may have a first chopping unit to generate a chopped voltage signal at an output of said first chopping unit, wherein the chopped voltage signal is generated by chopping an inductor voltage at the input of said inductor based on a duty cycle of the power converter. The power converter may have a reference current source, wherein the reference current source and a replica resistive element are arranged in series. The power converter may have a comparator unit to generate, based on the reference potential and based on the chopped voltage signal, a signal indicative of said light load condition.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: March 23, 2021
    Assignee: Dialog Semiconductor Inc.
    Inventors: Manmeet Singh, Pietro Gallina, Rosario Pagano, Vijay Choudhary, Vivek Parasuram, John Kesterson
  • Publication number: 20210044204
    Abstract: A multi-level buck converter is provided with seamless transitions back and forth from synchronous to asynchronous low dropout modes of operation.
    Type: Application
    Filed: August 6, 2019
    Publication date: February 11, 2021
    Inventors: John KESTERSON, Aravind MANGUDI, James STEELE, Mark MERCER
  • Patent number: 10685687
    Abstract: A memory element is provided in which a logical state can be securely stored in all conditions even when input set and reset signals are overlapping. This is achieved through provision of an array of persistence latches with an asynchronous circuit that ensures correct operation. The persistence latches provide a persistent output for each of the first and second edges of each input. The memory element is arranged to receive a plurality of inputs including a first and second input. Each first and second inputs include a digital signal that can transition between a first state via a first edge which triggers transition from the first state to the second state and a second edge which triggers transition from the second state to the first state.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: June 16, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Jung Woo Choi, John Kesterson, Gary Hague
  • Patent number: 10560025
    Abstract: A switching power converter is configured to control switching noise by implementing a plurality of pulse width modulation modes of operation. The peak current in each pulse width modulation mode of operation is controlled so that an output power for the switching power converter is continuous with regard to transitions between the pulse width modulation modes.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: February 11, 2020
    Assignee: DIALOG SEMICONDUCTOR INC.
    Inventors: John Shi, John Kesterson, Cong Zheng, Kai-Wen Chin
  • Publication number: 20190130948
    Abstract: A memory element is provided in which a logical state can be securely stored in all conditions even when input set and reset signals are overlapping. This is achieved through provision of an array of persistence latches with an asynchronous circuit that ensures correct operation. The persistence latches provide a persistent output for each of the first and second edges of each input. The memory element is arranged to receive a plurality of inputs including a first and second input. Each first and second inputs include a digital signal that can transition between a first state via a first edge which triggers transition from the first state to the second state and a second edge which triggers transition from the second state to the first state.
    Type: Application
    Filed: October 31, 2017
    Publication date: May 2, 2019
    Inventors: Jung Woo Choi, John Kesterson, Gary Hague
  • Patent number: 10250046
    Abstract: An apparatus and method for blocking electromagnetic interference, EMI is presented. In particular, the present invention relates to a switched mode power supply provided with an electromagnetic interference protection circuit with low power dissipation. There is provided an adiabatically-switched electromagnetic interference protection circuit. The protection circuit contains a first charge storage element and a second charge storage element. A switching regulator operates with a switching cycle having an on-time and an off-time; and the control signal is arranged to cause a transition between the first mode and the second mode to start during the off-time of a switching cycle of the switching regulator.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: April 2, 2019
    Assignee: Dialog Semiconductor, Inc.
    Inventor: John Kesterson
  • Patent number: 10230303
    Abstract: An isolated switching power converter is provided wherein a secondary side is valley mode switched to transmit data to a primary side. This provides secondary side regulation without the need for an optocoupler. Data communication between the primary and secondary sides of switching power converters is presented.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: March 12, 2019
    Assignee: Dialog Semiconductor, Inc.
    Inventors: Andrey Malinin, John Kesterson
  • Publication number: 20180205318
    Abstract: A switching power converter is configured to control switching noise by implementing a plurality of pulse width modulation modes of operation. The peak current in each pulse width modulation mode of operation is controlled so that an output power for the switching power converter is continuous with regard to transitions between the pulse width modulation modes.
    Type: Application
    Filed: March 13, 2018
    Publication date: July 19, 2018
    Inventors: John Shi, John Kesterson, Cong Zheng, Kai-Wen Chin
  • Patent number: 9970979
    Abstract: This application relates to a circuit for determining whether a first transistor device is in a predetermined operation mode. The circuit comprises comprising: a second transistor device, wherein control terminals of the first and second transistor devices are connected, and one of input and output terminals of the first transistor device is connected to the other one of input and output terminals of the second transistor device, a buffer amplifier connected between the one of input and output terminals of the first transistor device and the other one of input and output terminals of the second transistor device, and circuitry for determining whether the first transistor device is in the predetermined operation mode based on an indication of a current flowing through the second transistor device. The application further relates to a method of determining whether a first transistor device is in a predetermined operation mode.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: May 15, 2018
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Danilo Gerna, Enrico Pardi, John Kesterson
  • Patent number: 9917519
    Abstract: A switching power converter is configured to control switching noise by implementing a plurality of pulse width modulation modes of operation. The peak current in each pulse width modulation mode of operation is controlled so that an output power for the switching power converter is continuous with regard to transitions between the pulse width modulation modes.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: March 13, 2018
    Assignee: DIALOG SEMICONDUCTOR INC.
    Inventors: John Shi, John Kesterson, Cong Zheng, Kai-Wen Chin
  • Publication number: 20180062404
    Abstract: An apparatus and method for blocking electromagnetic interference, EMI is presented. In particular, the present invention relates to a switched mode power supply provided with an electromagnetic interference protection circuit with low power dissipation. There is provided an adiabatically-switched electromagnetic interference protection circuit. The protection circuit contains a first charge storage element and a second charge storage element. A switching regulator operates with a switching cycle having an on-time and an off-time; and the control signal is arranged to cause a transition between the first mode and the second mode to start during the off-time of a switching cycle of the switching regulator.
    Type: Application
    Filed: August 30, 2016
    Publication date: March 1, 2018
    Inventor: John Kesterson
  • Publication number: 20170250612
    Abstract: An isolated switching power converter is provided wherein a secondary side is valley mode switched to transmit data to a primary side. This provides secondary side regulation without the need for an optocoupler. Data communication between the primary and secondary sides of switching power converters is presented.
    Type: Application
    Filed: May 15, 2017
    Publication date: August 31, 2017
    Inventors: Andrey Malinin, John Kesterson
  • Publication number: 20170214320
    Abstract: A switching power converter is configured to control switching noise by implementing a plurality of pulse width modulation modes of operation. The peak current in each pulse width modulation mode of operation is controlled so that an output power for the switching power converter is continuous with regard to transitions between the pulse width modulation modes.
    Type: Application
    Filed: January 25, 2016
    Publication date: July 27, 2017
    Inventors: John Shi, John Kesterson, Cong Zheng, Kai-Wen Chin
  • Patent number: 9559597
    Abstract: A power converter has a transformer including a primary winding coupled to an input voltage, a secondary winding coupled to an output of the power converter, and an auxiliary winding is configured to detect an open connection fault of the auxiliary winding. The power converter includes a current source coupled to the auxiliary winding that, when activated, supplies a current to the auxiliary winding. A controller measures a voltage across the auxiliary winding. Responsive to detecting an increase in the voltage across the auxiliary winding while the current source is activated, the controller disables the power converter.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: January 31, 2017
    Assignees: Dialog Semiconductor Inc., Dialog Semiconductor (UK) Limited
    Inventors: Andrey Malinin, Tino Lin, Jiandong Zhang, John Kesterson, Qiu Sha
  • Publication number: 20170010316
    Abstract: This application relates to a circuit for determining whether a first transistor device is in a predetermined operation mode. The circuit comprises comprising: a second transistor device, wherein control terminals of the first and second transistor devices are connected, and one of input and output terminals of the first transistor device is connected to the other one of input and output terminals of the second transistor device, a buffer amplifier connected between the one of input and output terminals of the first transistor device and the other one of input and output terminals of the second transistor device, and circuitry for determining whether the first transistor device is in the predetermined operation mode based on an indication of a current flowing through the second transistor device. The application further relates to a method of determining whether a first transistor device is in a predetermined operation mode.
    Type: Application
    Filed: July 6, 2015
    Publication date: January 12, 2017
    Inventors: Danilo Gerna, Enrico Pardi, John Kesterson
  • Patent number: 9473033
    Abstract: A two-terminal device that is configured to respond to a voltage modulation of an input signal received through the two terminals by triggering an action. The two-terminal device is further configured to verify a result of the triggered action by modulating a current driven through the two termi+6nals.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: October 18, 2016
    Assignee: DIALOG SEMICONDUCTOR, INC.
    Inventors: Kai-Wen Chin, John Kesterson, Fuqiang Shi, Henry Wong, Pengju Kong