Patents by Inventor John Kesterson
John Kesterson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260088723Abstract: A single-stage multiple-output switching power converter is provided that includes a switch in each output. A secondary controller controls the switches to distribute a secondary winding current to the multiple outputs so as to regulate a different output voltage at each multiple output.Type: ApplicationFiled: September 25, 2024Publication date: March 26, 2026Inventors: Yimin Chen, Guoxiong Chen, Yong Li, John Kesterson
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Patent number: 12506409Abstract: A step-down converter is presented. The step down converter includes a power stage having at least one phase, each phase comprising an inductor, a driver, and a clock source. The driver drives the power stage in a synchronous mode or in an asynchronous mode of operation with a minimum off time. When the output voltage approaches the input voltage of the converter, a duty cycle of the converter increases up to a value limited by the minimum off time. The clock source generates a first clock signal having a predefined pulse width. The driver generates a first stretchable clock signal having an adjustable pulse width and an adjustable period. Upon transition from the synchronous mode to the asynchronous mode the driver is configured to increase the adjustable pulse width and the period of the first stretchable clock signal.Type: GrantFiled: December 26, 2023Date of Patent: December 23, 2025Assignee: Renesas Design (UK) LimitedInventors: Mark Mercer, John Kesterson
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Publication number: 20250211110Abstract: A step-down converter is presented. The step down converter includes a power stage having at least one phase, each phase comprising an inductor, a driver, and a clock source. The driver drives the power stage in a synchronous mode or in an asynchronous mode of operation with a minimum off time. When the output voltage approaches the input voltage of the converter, a duty cycle of the converter increases up to a value limited by the minimum off time. The clock source generates a first clock signal having a predefined pulse width. The driver generates a first stretchable clock signal having an adjustable pulse width and an adjustable period. Upon transition from the synchronous mode to the asynchronous mode the driver is configured to increase the adjustable pulse width and the period of the first stretchable clock signal.Type: ApplicationFiled: December 26, 2023Publication date: June 26, 2025Applicant: Renesas Design (UK) LimitedInventors: Mark MERCER, John KESTERSON
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Patent number: 10998818Abstract: A multi-level buck converter is provided with seamless transitions back and forth from synchronous to asynchronous low dropout modes of operation.Type: GrantFiled: August 6, 2019Date of Patent: May 4, 2021Assignee: Dialog Semiconductor (UK) LimitedInventors: John Kesterson, Aravind Mangudi, James Steele, Mark Mercer
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Patent number: 10958174Abstract: A power converter and method to detect a light load condition at an output of the power converter are presented. The power converter may have an inductor and a resistive element connected between an input of the power converter and an input of the inductor. The power converter may have a first chopping unit to generate a chopped voltage signal at an output of said first chopping unit, wherein the chopped voltage signal is generated by chopping an inductor voltage at the input of said inductor based on a duty cycle of the power converter. The power converter may have a reference current source, wherein the reference current source and a replica resistive element are arranged in series. The power converter may have a comparator unit to generate, based on the reference potential and based on the chopped voltage signal, a signal indicative of said light load condition.Type: GrantFiled: July 8, 2019Date of Patent: March 23, 2021Assignee: Dialog Semiconductor Inc.Inventors: Manmeet Singh, Pietro Gallina, Rosario Pagano, Vijay Choudhary, Vivek Parasuram, John Kesterson
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Publication number: 20210044204Abstract: A multi-level buck converter is provided with seamless transitions back and forth from synchronous to asynchronous low dropout modes of operation.Type: ApplicationFiled: August 6, 2019Publication date: February 11, 2021Inventors: John KESTERSON, Aravind MANGUDI, James STEELE, Mark MERCER
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Patent number: 10685687Abstract: A memory element is provided in which a logical state can be securely stored in all conditions even when input set and reset signals are overlapping. This is achieved through provision of an array of persistence latches with an asynchronous circuit that ensures correct operation. The persistence latches provide a persistent output for each of the first and second edges of each input. The memory element is arranged to receive a plurality of inputs including a first and second input. Each first and second inputs include a digital signal that can transition between a first state via a first edge which triggers transition from the first state to the second state and a second edge which triggers transition from the second state to the first state.Type: GrantFiled: October 31, 2017Date of Patent: June 16, 2020Assignee: Dialog Semiconductor (UK) LimitedInventors: Jung Woo Choi, John Kesterson, Gary Hague
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Patent number: 10560025Abstract: A switching power converter is configured to control switching noise by implementing a plurality of pulse width modulation modes of operation. The peak current in each pulse width modulation mode of operation is controlled so that an output power for the switching power converter is continuous with regard to transitions between the pulse width modulation modes.Type: GrantFiled: March 13, 2018Date of Patent: February 11, 2020Assignee: DIALOG SEMICONDUCTOR INC.Inventors: John Shi, John Kesterson, Cong Zheng, Kai-Wen Chin
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Publication number: 20190130948Abstract: A memory element is provided in which a logical state can be securely stored in all conditions even when input set and reset signals are overlapping. This is achieved through provision of an array of persistence latches with an asynchronous circuit that ensures correct operation. The persistence latches provide a persistent output for each of the first and second edges of each input. The memory element is arranged to receive a plurality of inputs including a first and second input. Each first and second inputs include a digital signal that can transition between a first state via a first edge which triggers transition from the first state to the second state and a second edge which triggers transition from the second state to the first state.Type: ApplicationFiled: October 31, 2017Publication date: May 2, 2019Inventors: Jung Woo Choi, John Kesterson, Gary Hague
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Patent number: 10250046Abstract: An apparatus and method for blocking electromagnetic interference, EMI is presented. In particular, the present invention relates to a switched mode power supply provided with an electromagnetic interference protection circuit with low power dissipation. There is provided an adiabatically-switched electromagnetic interference protection circuit. The protection circuit contains a first charge storage element and a second charge storage element. A switching regulator operates with a switching cycle having an on-time and an off-time; and the control signal is arranged to cause a transition between the first mode and the second mode to start during the off-time of a switching cycle of the switching regulator.Type: GrantFiled: August 30, 2016Date of Patent: April 2, 2019Assignee: Dialog Semiconductor, Inc.Inventor: John Kesterson
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Patent number: 10230303Abstract: An isolated switching power converter is provided wherein a secondary side is valley mode switched to transmit data to a primary side. This provides secondary side regulation without the need for an optocoupler. Data communication between the primary and secondary sides of switching power converters is presented.Type: GrantFiled: May 15, 2017Date of Patent: March 12, 2019Assignee: Dialog Semiconductor, Inc.Inventors: Andrey Malinin, John Kesterson
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Publication number: 20180205318Abstract: A switching power converter is configured to control switching noise by implementing a plurality of pulse width modulation modes of operation. The peak current in each pulse width modulation mode of operation is controlled so that an output power for the switching power converter is continuous with regard to transitions between the pulse width modulation modes.Type: ApplicationFiled: March 13, 2018Publication date: July 19, 2018Inventors: John Shi, John Kesterson, Cong Zheng, Kai-Wen Chin
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Patent number: 9970979Abstract: This application relates to a circuit for determining whether a first transistor device is in a predetermined operation mode. The circuit comprises comprising: a second transistor device, wherein control terminals of the first and second transistor devices are connected, and one of input and output terminals of the first transistor device is connected to the other one of input and output terminals of the second transistor device, a buffer amplifier connected between the one of input and output terminals of the first transistor device and the other one of input and output terminals of the second transistor device, and circuitry for determining whether the first transistor device is in the predetermined operation mode based on an indication of a current flowing through the second transistor device. The application further relates to a method of determining whether a first transistor device is in a predetermined operation mode.Type: GrantFiled: July 6, 2015Date of Patent: May 15, 2018Assignee: Dialog Semiconductor (UK) LimitedInventors: Danilo Gerna, Enrico Pardi, John Kesterson
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Patent number: 9917519Abstract: A switching power converter is configured to control switching noise by implementing a plurality of pulse width modulation modes of operation. The peak current in each pulse width modulation mode of operation is controlled so that an output power for the switching power converter is continuous with regard to transitions between the pulse width modulation modes.Type: GrantFiled: January 25, 2016Date of Patent: March 13, 2018Assignee: DIALOG SEMICONDUCTOR INC.Inventors: John Shi, John Kesterson, Cong Zheng, Kai-Wen Chin
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Publication number: 20180062404Abstract: An apparatus and method for blocking electromagnetic interference, EMI is presented. In particular, the present invention relates to a switched mode power supply provided with an electromagnetic interference protection circuit with low power dissipation. There is provided an adiabatically-switched electromagnetic interference protection circuit. The protection circuit contains a first charge storage element and a second charge storage element. A switching regulator operates with a switching cycle having an on-time and an off-time; and the control signal is arranged to cause a transition between the first mode and the second mode to start during the off-time of a switching cycle of the switching regulator.Type: ApplicationFiled: August 30, 2016Publication date: March 1, 2018Inventor: John Kesterson
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Publication number: 20170250612Abstract: An isolated switching power converter is provided wherein a secondary side is valley mode switched to transmit data to a primary side. This provides secondary side regulation without the need for an optocoupler. Data communication between the primary and secondary sides of switching power converters is presented.Type: ApplicationFiled: May 15, 2017Publication date: August 31, 2017Inventors: Andrey Malinin, John Kesterson
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Publication number: 20170214320Abstract: A switching power converter is configured to control switching noise by implementing a plurality of pulse width modulation modes of operation. The peak current in each pulse width modulation mode of operation is controlled so that an output power for the switching power converter is continuous with regard to transitions between the pulse width modulation modes.Type: ApplicationFiled: January 25, 2016Publication date: July 27, 2017Inventors: John Shi, John Kesterson, Cong Zheng, Kai-Wen Chin
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Patent number: 9559597Abstract: A power converter has a transformer including a primary winding coupled to an input voltage, a secondary winding coupled to an output of the power converter, and an auxiliary winding is configured to detect an open connection fault of the auxiliary winding. The power converter includes a current source coupled to the auxiliary winding that, when activated, supplies a current to the auxiliary winding. A controller measures a voltage across the auxiliary winding. Responsive to detecting an increase in the voltage across the auxiliary winding while the current source is activated, the controller disables the power converter.Type: GrantFiled: February 27, 2015Date of Patent: January 31, 2017Assignees: Dialog Semiconductor Inc., Dialog Semiconductor (UK) LimitedInventors: Andrey Malinin, Tino Lin, Jiandong Zhang, John Kesterson, Qiu Sha
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Publication number: 20170010316Abstract: This application relates to a circuit for determining whether a first transistor device is in a predetermined operation mode. The circuit comprises comprising: a second transistor device, wherein control terminals of the first and second transistor devices are connected, and one of input and output terminals of the first transistor device is connected to the other one of input and output terminals of the second transistor device, a buffer amplifier connected between the one of input and output terminals of the first transistor device and the other one of input and output terminals of the second transistor device, and circuitry for determining whether the first transistor device is in the predetermined operation mode based on an indication of a current flowing through the second transistor device. The application further relates to a method of determining whether a first transistor device is in a predetermined operation mode.Type: ApplicationFiled: July 6, 2015Publication date: January 12, 2017Inventors: Danilo Gerna, Enrico Pardi, John Kesterson
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Patent number: 9473033Abstract: A two-terminal device that is configured to respond to a voltage modulation of an input signal received through the two terminals by triggering an action. The two-terminal device is further configured to verify a result of the triggered action by modulating a current driven through the two termi+6nals.Type: GrantFiled: December 29, 2014Date of Patent: October 18, 2016Assignee: DIALOG SEMICONDUCTOR, INC.Inventors: Kai-Wen Chin, John Kesterson, Fuqiang Shi, Henry Wong, Pengju Kong