Patents by Inventor John Kikidis

John Kikidis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9299401
    Abstract: An apparatus is described that includes a combined drive and termination circuit programmable to interface to DDR2 and DDR3 memory modules. In an exemplary embodiment the apparatus includes a combined output/termination driver, an input driver and a calibration subsystem. The combined output/termination driver includes a number of pull-up circuits and a number of pull-down circuits. One of the pull-up circuits presents a fixed output impedance. The rest of the pull-up circuits have an impedance programmable between two desired impedance values. One of the pull-down circuits presents a fixed output impedance. The rest of the pull-down circuits have an impedance programmable between two desired impedance values. The necessary number of pull-up circuits and pull-down circuits is activated in order to provide a desired driving and termination circuit such as to interface to specific impedance values as defined by the DDR2 and DDR3 interface protocol.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: March 29, 2016
    Assignee: ANALOGIES SA
    Inventors: Fotis Plessas, Efthimios Davrazos, Michael Birbas, John Kikidis
  • Publication number: 20130103898
    Abstract: An apparatus is described that includes a combined drive and termination circuit programmable to interface to DDR2 and DDR3 memory modules. In an exemplary embodiment the apparatus includes a combined output/termination driver, an input driver and a calibration subsystem. The combined output/termination driver includes a number of pull-up circuits and a number of pull-down circuits. One of the pull-up circuits presents a fixed output impedance. The rest of the pull-up circuits have an impedance programmable between two desired impedance values. One of the pull-down circuits presents a fixed output impedance. The rest of the pull-down circuits have an impedance programmable between two desired impedance values. The necessary number of pull-up circuits and pull-down circuits is activated in order to provide a desired driving and termination circuit such as to interface to specific impedance values as defined by the DDR2 and DDR3 interface protocol.
    Type: Application
    Filed: January 27, 2011
    Publication date: April 25, 2013
    Applicant: ANALOGIES, S.A.
    Inventors: Fotis Plessas, Efthimios Davrazos, Michael Birbas, John Kikidis
  • Publication number: 20120092202
    Abstract: An analog to digital converter for converting an initial analog signal into a digital signal comprising at least one electronic module with an input, a first output, and a second output, which module generates from an analog input signal: a first output signal, which first output signal in terms of multiples of a predetermined amount of current or voltage, such as 1 uA or 1 mV, is substantially equal to the integer quotient of division of the input signal by a number or comprises a plurality of signals which if combined are substantially equal to the integer quotient of division of the input signal in terms of multiples of a predetermined amount of current or voltage, and a second output signal which in terms of multiples of a predetermined amount of current or voltage, such as 1 uA or 1 mV, is substantially equal to the remainder of the division, the analog to digital converter also comprising a further analog to digital converter for converting the second output signal into a digital signal, wherein the fur
    Type: Application
    Filed: September 1, 2009
    Publication date: April 19, 2012
    Inventors: Nikolaos Petrellis, Michael Birbas, John Kikidis
  • Publication number: 20030081596
    Abstract: A device is provided comprising an intelligent optical network linecard. An intelligent optical linecard can utilize localized processing that facilitates scaling, enables switching in the optical domain, promotes management of dissimilar networks, provides the ability for bandwidth allocation on demand and in general can interface and utilize optical control plane signaling to dynamically control linecard functions.
    Type: Application
    Filed: June 6, 2002
    Publication date: May 1, 2003
    Inventors: John Kikidis, Vagelis Mariatos, Kostas Adaos, Finn Leif Kraemer