Abstract: A method, system and computer program for transferring packets between devices connected to a PCI-Express bus of a computer. A selected pair of devices, such as for example a root complex device and an endpoint device or a pair of endpoint devices, connected to the PCI-Express bus, are configured to transmit/receive data with their respective maximum payload size (MPS). A packet, such as for example a read completion packet, a write memory packet or a message request packet, can then be transmitted from the source device to the destination device. If the source device MPS exceeds the destination device MPS, the packet can be divided into a plurality of sub-packets. Each of sub packets has a maxmimum payload size based on the MPS of the destination device. The sub-packets can then be transmitted to the destination device so that the packet can be delivered to the destination device.

Abstract: A shared resource manager circuit for use in conjunction with multiple processors to manage allocation and deallocation of a shared resource. The shared resource manager allocates and deallocates software resources for utilization by the processors in response to allocation and deallocation requests by the processors. The shared resource manager may include a bus arbitrator as required in a particular application for interfacing with a system bus coupled to the processors to provide mutual exclusion in access to the shared resource manager among the multiple processors. The shared resource manager may manage a memory block (FIFO queue) with multiple resource control blocks. A system may advantageously apply a plurality of shared resource managers coupled to a plurality of processors via a common interface bus. Each shared resource manager device may then be associated with management of one particular shared resource.