Abstract: A converter for converting a high frequency video input signal to a digital signal by detecting the peak voltages of the input signal. A video input signal fans out to a plurality of comparators of which each are connected to a resistive ladder of equal resistors values. One end of the resistive ladder is connected with a positive reference voltage and the other end is connected with a negative reference voltage. Real time is divided into sampling bins determined by the cycle time of a clock and, within each bin, the digital output from a plurality of master-slave flip-flops shows the maximum level reached by the video input signal. The outputs from the flip-flops go to a pair of priority encoders and a multiplexer for indicating in digital form the highest point reached on the resistive ladder.