Patents by Inventor John Lodge
John Lodge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11668229Abstract: Aspects of the disclosure are directed to an engine crank. In accordance with one aspect, the engine crank includes a first web, wherein the first web includes a first plurality of air channels, and a second web coupled to the first web, wherein the second web includes a second plurality of air channels.Type: GrantFiled: June 8, 2022Date of Patent: June 6, 2023Inventor: Kenneth John Lodge
-
Patent number: 10320425Abstract: In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi?1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi?1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code.Type: GrantFiled: June 27, 2016Date of Patent: June 11, 2019Assignee: INPHI CORPORATIONInventors: Arash Farhoodfar, Frank R. Kschischang, Andrew Hunt, Benjamin P. Smith, John Lodge
-
Publication number: 20160308558Abstract: In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi?1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi?1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code.Type: ApplicationFiled: June 27, 2016Publication date: October 20, 2016Inventors: Arash Farhoodfar, Frank R. Kschischang, Andrew Hunt, Benjamin P. Smith, John Lodge
-
Patent number: 9397702Abstract: In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, i a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi?1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi?1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol block Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol block Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code.Type: GrantFiled: April 30, 2014Date of Patent: July 19, 2016Assignee: Cortina Systems, Inc.Inventors: Arash Farhoodfar, Frank R. Kschischang, Andrew Hunt, Benjamin P. Smith, John Lodge
-
Publication number: 20140237325Abstract: In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, i a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi?1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi?1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol block Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol block Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code.Type: ApplicationFiled: April 30, 2014Publication date: August 21, 2014Applicant: CORTINA SYSTEMS, INC.Inventors: Arash Farhoodfar, Frank R. Kschischang, Andrew Hunt, Benjamin P. Smith, John Lodge
-
Patent number: 8751910Abstract: In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, i a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi?1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi?1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol block Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol block Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code.Type: GrantFiled: April 13, 2011Date of Patent: June 10, 2014Assignee: Cortina Systems, Inc.Inventors: Arash Farhoodfar, Frank R. Kschischang, Andrew Hunt, Benjamin P. Smith, John Lodge
-
Patent number: 8300675Abstract: The invention relates to a method and apparatus for acquiring a complex spreading code of a direct sequence spread spectrum signal (DSSS) by acquiring a state of a spreading code generator capable of generating the complex spreading code. A sequence of bipolar differential product values, which sign is independent on data transmitted by the DSSS signal, is obtained by combining in-phase and quadrature samples of the DSSS signal for adjacent chip intervals. This sequence is provided to a linear block decoder for obtaining a codeword of a linear block code, which is defined by a structure of the spreading generator and the differential product operation. The codeword is used to compute the state of the spreading code generator.Type: GrantFiled: May 13, 2010Date of Patent: October 30, 2012Assignee: Her Majesty the Queen in Right of Canada, as represented by the Minister of Industry, through the Communications Research Centre CanadaInventors: Ron Kerr, Paul Guinand, John Lodge
-
Publication number: 20120266051Abstract: In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, i a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi?1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi?1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol block Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol block Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code.Type: ApplicationFiled: April 13, 2011Publication date: October 18, 2012Applicant: CORTINA SYSTEMS, INC.Inventors: Arash Farhoodfar, Frank R. Kschischang, Andrew Hunt, Benjamin P. Smith, John Lodge
-
Publication number: 20100290506Abstract: The invention relates to a method and apparatus for acquiring a complex spreading code of a direct sequence spread spectrum signal (DSSS) by acquiring a state of a spreading code generator capable of generating the complex spreading code. A sequence of bipolar differential product values, which sign is independent on data transmitted by the DSSS signal, is obtained by combining in-phase and quadrature samples of the DSSS signal for adjacent chip intervals. This sequence is provided to a linear block decoder for obtaining a codeword of a linear block code, which is defined by a structure of the spreading generator and the differential product operation. The codeword is used to compute the state of the spreading code generator.Type: ApplicationFiled: May 13, 2010Publication date: November 18, 2010Inventors: Ron Kerr, Paul Guinand, John Lodge
-
Patent number: 7565286Abstract: A method for lost speech samples recovery in speech transmission systems is disclosed. The method employs a waveform coder operating on digital speech samples. It exploits the composite model of speech, wherein each speech segment contains both periodic and colored noise components, and separately estimates these two components of the unreliable samples. First, adaptive FIR filters computed from received signal statistics are used to interpolate estimates of the periodic component for the unreliable samples. These FIR filters are inherently stable and typically short, since only strongly correlated elements of the signal corresponding to pitch offset samples are used to compute the estimate. These periodic estimates are also computed for sample times corresponding to reliable samples adjacent to the unreliable sample interval. The differences between these reliable samples and the corresponding periodic estimates are considered as samples of the noise component.Type: GrantFiled: July 16, 2004Date of Patent: July 21, 2009Assignee: Her Majesty the Queen in right of Canada, as represented by the Minister of Industry, Through the Communications Research Centre CanadaInventors: Ken Gracie, John Lodge
-
Patent number: 7203893Abstract: A method of decoding soft input information related to a transmitted word of a linear block code (n, k) and providing hard or soft output information is disclosed. The method comprises the steps of forming a reliability vector from the input information, identifying (n?k) linearly independent least reliable symbols and k most reliable symbols, converting a parity check matrix of the linear block code to a pseudo-systematic form with respect to the least reliable symbols, calculating extrinsic information and composite information for the most reliable symbols using the soft input information and the pseudo-systematic parity check matrix, and calculating extrinsic information for the least reliable systems using composite information for the most reliable symbols.Type: GrantFiled: April 29, 2004Date of Patent: April 10, 2007Assignee: Her Majesty the Queen in Right of Canada as represented by the Minister of Indusrty, though the Communications Research Centre CanadaInventors: Ron Kerr, John Lodge, Paul Guinand
-
Publication number: 20050015242Abstract: A method for lost speech samples recovery in speech transmission systems is disclosed. The method employs a waveform coder operating on digital speech samples. It exploits the composite model of speech, wherein each speech segment contains both periodic and colored noise components, and separately estimates these two components of the unreliable samples. First, adaptive FIR filters computed from received signal statistics are used to interpolate estimates of the periodic component for the unreliable samples. These FIR filters are inherently stable and typically short, since only strongly correlated elements of the signal corresponding to pitch offset samples are used to compute the estimate. These periodic estimates are also computed for sample times corresponding to reliable samples adjacent to the unreliable sample interval. The differences between these reliable samples and the corresponding periodic estimates are considered as samples of the noise component.Type: ApplicationFiled: July 16, 2004Publication date: January 20, 2005Inventors: Ken Gracie, John Lodge
-
Publication number: 20040225940Abstract: A method of decoding soft input information related to a transmitted word of a linear block code (n, k) and providing hard or soft output information is disclosed. The method comprises the steps of forming a reliability vector from the input information, identifying (n−k) linearly independent least reliable symbols and k most reliable symbols, converting a parity check matrix of the linear block code to a pseudo-systematic form with respect to the least reliable symbols, calculating extrinsic information and composite information for the most reliable symbols using the soft input information and the pseudo-systematic parity check matrix, and calculating extrinsic information for the least reliable systems using composite information for the most reliable symbols.Type: ApplicationFiled: April 29, 2004Publication date: November 11, 2004Inventors: Ron Kerr, John Lodge, Paul Guinand
-
Patent number: 6718508Abstract: A method for generating new forward error correction codes, called skew codes, for the reliable transmission of data in noisy channels is disclosed. The method involves adding additional sets of parity equations across the third dimension of a cubic array of bits. The parity equations are applied to the cubic array such that the rectangular patterns of one square array do not match up with a rectangular pattern in another square array. By selecting skew mapping parameters of the parity equations from a set of quadratic residues of prime numbers according to specific design rules, the resulting codes are well suited to low-complexity high-speed iterative decoding, and have error correction performance and error detection capability, particularly for applications requiring high code rates.Type: GrantFiled: May 25, 2001Date of Patent: April 6, 2004Assignee: Her Majesty the Queen in right of Canada, as represented by the Minister of Industry through the Communication Research CentreInventors: John Lodge, Andrew Hunt, Paul Guinand
-
Patent number: 6530059Abstract: A method of creating tail-biting recursive systematic convolutional and turbo codes, and the associated encoders, are described herein. According to the method, symbols from the set of data to be transmitted are used to preset the starting state of the encoder, and are replaced in a systematic set by an equivalent number of tail-biting symbols that force the ending state of the encoder to be the same as the starting state. The presetting of the starting state allows for simpler calculations in choosing the tail-biting symbols, and allows a message to be transmitted with a reduced number of symbols The reduction in the number of symbols used for overhead in this invention provides an increase in the data transmission rate.Type: GrantFiled: June 1, 1999Date of Patent: March 4, 2003Assignee: Her Majesty the Queen in right of Canada, as represented by the Minister of Industry Through the Communication Research CentreInventors: Stewart N. Crozier, Andrew Hunt, John Lodge, Paul Guinand
-
Patent number: 6510536Abstract: Methods of reduced-complexity max-log-APP processing are disclosed for use with Turbo and Turbo-like decoders. The invented methods of decoding are derived from max-log-APP processing and significantly lower the processing required for decoding convolutional codes by eliminating a portion of the calculations conventionally associated with max-log-APP processing. The disclosed embodiments provide simplified methods of metric combining based on determining the bits of an MLSE sequence with different alternative approaches. Also disclosed is an early stopping method that uses the reduced-complexity max-log-APP decoder to reduce the average number of decoding operations required by an iterative Turbo decoder.Type: GrantFiled: June 1, 1999Date of Patent: January 21, 2003Assignee: Her Majesty the Queen in right of Canada, as represented by the Minister of Industry through the Communications Research CentreInventors: Stewart N. Crozier, Ken Gracie, Andrew Hunt, John Lodge, Paul Guinand
-
Publication number: 20020010892Abstract: A method for generating new forward error correction codes, called skew codes, for the reliable transmission of data in noisy channels is disclosed. The method involves adding additional sets of parity equations across the third dimension of a cubic array of bits. The parity equations are applied to the cubic array such that the rectangular patterns of one square array do not match up with a rectangular pattern in another square array. By selecting skew mapping parameters of the parity equations from a set of quadratic residues of prime numbers according to specific design rules, the resulting codes are well suited to low-complexity high-speed iterative decoding, and have error correction performance and error detection capability, particularly for applications requiring high code rates.Type: ApplicationFiled: May 25, 2001Publication date: January 24, 2002Inventors: John Lodge, Andrew W. Hunt, Paul Guinand
-
Patent number: 6339834Abstract: Interleavers based on golden-section increments are disclosed for use with Turbo and Turbo-like error-correcting codes. The interleavers have a tendency to maximally spread the error-bursts generated by an error-burst channel or decoder, independent of the error-burst length. The code block size uniquely defines a golden section increment without having to perform a time consuming search for the best increment value. The disclosed embodiments include golden relative prime interleavers, golden vector interleavers and dithered golden vector interleavers. Also disclosed are methods to reduce the size of memory required for storing the interleaving indexes.Type: GrantFiled: May 27, 1999Date of Patent: January 15, 2002Assignee: Her Majesty the Queen in right of Canada, as represented by the Minister of Industry through the Communication Research CentreInventors: Stewart N. Crozier, Andrew Hunt, John Lodge, Paul Guinand
-
Patent number: 6145111Abstract: A method of encoding data is described herein. According to the method, source data elements are coded using one or more product codes having a common component code. The resulting one or more primary product codewords consist of a plurality of first codewords of the common component code. One or more first sets of codewords of the common component code are assembled such that each of the first sets comprises two or more distinct first codewords forming part of a same primary product codeword. Each of the codewords of each of the first sets is codeword-mapped to a second codeword of the common component code using a one-to-one codeword-mapping. One or more second sets of second codewords are provided, where each second set corresponds to a first set of codewords. The codeword-mapping includes re-ordering, according to a known interleaving pattern, the symbols within a codeword.Type: GrantFiled: August 14, 1998Date of Patent: November 7, 2000Assignee: Her Majesty the Queen in right of Canada, as represented by the Minister of Industry through Communications Research CentreInventors: Stewart Crozier, Andrew Hunt, John Lodge
-
Patent number: 6145114Abstract: The invention comprises an enhancement to max-log-APP processing that significantly reduces performance degradation associated with introducing the "max" approximation into log-APP computations, while still maintaining lower computational complexity associated with max-log-APP processing. This enhancement is achieved by adjusting extrinsic information produced by a max-log-APP process where the magnitude of the extrinsic information is reduced, for example, by multiplying it with a scale factor between 0 and 1.Type: GrantFiled: August 14, 1998Date of Patent: November 7, 2000Assignee: Her Majesty the Queen in right of Canada, as represented by the Minister of Industry through Communications Research CentreInventors: Stewart Crozier, Andrew Hunt, John Lodge