Abstract: A multi-loop voltage regulator with load tracking compensation includes a first closed-loop feedback network configured to receive a supply voltage from a power supply and drive an output voltage that is smaller than the supply voltage to a load. The multi-loop voltage regulator includes a second closed-loop feedback network connected to the first closed-loop feedback network and configured to regulate the output voltage between a first supply voltage rail and a second supply voltage rail for a given load current, in which the second closed-loop feedback network produces a gain that is greater than that of the first closed-loop feedback network. The multi-loop voltage regulator also includes a load tracking compensation circuit configured to detect a load current, and to increase the gain of the second closed-loop feedback network based on a dominant pole in the second closed-loop feedback network being a function of the detected load current.

Abstract: A multi-loop voltage regulator with load tracking compensation includes a first closed-loop feedback network configured to receive a supply voltage from a power supply and drive an output voltage that is smaller than the supply voltage to a load. The multi-loop voltage regulator includes a second closed-loop feedback network connected to the first closed-loop feedback network and configured to regulate the output voltage between a first supply voltage rail and a second supply voltage rail for a given load current, in which the second closed-loop feedback network produces a gain that is greater than that of the first closed-loop feedback network. The multi-loop voltage regulator also includes a load tracking compensation circuit configured to detect a load current, and to increase the gain of the second closed-loop feedback network based on a dominant pole in the second closed-loop feedback network being a function of the detected load current.

Abstract: On-chip absolute value measurement circuit and an on-chip capacitor mismatch value measurement circuits are provided. The absolute value measurement circuit begins charging a capacitor. When the voltage across the capacitor reaches a first threshold, the absolute value measurement circuit starts a counter. When the voltage across the capacitor reaches a second threshold, the counter stops. The counter value is provided as digital output. A computer device reads the digital output and calculates the absolute value of the capacitor based on the counter value. The mismatch measurement circuit repeatedly charges an evaluation capacitor and transfers the charge from the evaluation capacitor to an integrating capacitor. For each transfer of charge, a counter is incremented until the voltage across the integrating capacitor reaches a threshold voltage. The counter value is provided as digital output. This process is repeated for each evaluation capacitor on the chip.

Abstract: On-chip absolute value measurement circuit and an on-chip capacitor mismatch value measurement circuits are provided. The absolute value measurement circuit begins charging a capacitor. When the voltage across the capacitor reaches a first threshold, the absolute value measurement circuit starts a counter. When the voltage across the capacitor reaches a second threshold, the counter stops. The counter value is provided as digital output. A computer device reads the digital output and calculates the absolute value of the capacitor based on the counter value. The mismatch measurement circuit repeatedly charges an evaluation capacitor and transfers the charge from the evaluation capacitor to an integrating capacitor. For each transfer of charge, a counter is incremented until the voltage across the integrating capacitor reaches a threshold voltage. The counter value is provided as digital output. This process is repeated for each evaluation capacitor on the chip.