Abstract: An addressing and control system for a mass memory which is partitioned into selectable pages of individually specified size. The invention generates a composite address for the mass memory so that a microcomputer of limited address size can access the mass memory by individually specified page. One circuit implementation utilizes a register to latch page size and selection information for subsequent combination with address information to generate a full address for the mass memory. In that situation, the size register multiplexes the address bus information and page selection information to maintain correspondence between the specified size of the page and the total addressing bits available. In another form, the invention provides for supplementing the number of address bus bits with bits transmitted over the data bus to extend the bit length of the address used to access the mass memory.

Abstract: Method of fabricating a magnetic bubble memory device in which the magnetizable upper overlay pattern of magnetically soft material, e.g. permalloy, defining bubble propagation elements and bubble function-determining components as located above a bubble-supporting magnetic film is disposed in a wholly planar configuration to avoid bubble propagation anomalies encountered with typical non-planar overlay patterns of magnetically soft material. The fabrication method provides for the consecutive deposition onto a substrate having a magnetic film capable of supporting magnetic bubbles of a layer of non-magnetic electrically conductive material, a layer of insulating material, and a layer of magnetically soft material, such as permalloy.