Abstract: A minimal pin package for a mixed signal integrated circuit for a mixed signal processor based integrated circuit includes a semiconductor chip having a plurality of bond pads disposed thereon with a digital processor digitally interfaceable with at least one of the bond pads. An analog circuit block is provided and interfaceable with at least one of the bond pads. A die pad is provided on which the chip is mounted and N terminals on the package are interfaced to the exterior of the package, one of which is integral with the die pad. Bond wires interface select ones of the bond pads to a supply designated one of the terminals, a ground one of the terminals and the die pad associated with one of the terminals, the rest of the N-3 terminals interfaced to remaining functionality of the chip.

Abstract: A technique for improving the quality factor of an inductor includes increasing a cross-sectional area of the inductor by increasing a vertical dimension associated with the inductor. An apparatus includes an inductor formed partially in a first integrated circuit die and formed partially in at least a second integrated circuit die. The inductor may be formed partially in at least one interconnect structure between the first integrated circuit die and the second integrated circuit die. In at least one embodiment of the invention, the inductor is self-shielding and is configured to generate a magnetic field in response to a current flowing through coupled conductor portions of the self-shielding inductor. The magnetic field of the self-shielding inductor is substantially confined to a core region of the self-shielding inductor.