Patents by Inventor John M. Esper

John M. Esper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • BRANCH TYPE LOGGING IN LAST BRANCH REGISTERS
    Publication number: 20230092268
    Abstract: A processor includes a counter to store a cycle count that tracks a number of cycles between retirement of a first branch instruction and retirement of a second branch instruction during execution of a set of instructions. The processor further includes a stack of registers coupled to the counter, wherein the stack of registers is to store branch type information including: a first value of the counter when the first branch instruction is retired; a second value of the counter when the second branch instruction is retired; a first type information value indicating a type of the first branch instruction; and a second type information value indicating a type of the second branch instruction.
    Type: Application
    Filed: November 22, 2022
    Publication date: March 23, 2023
    Inventors: Michael W. Chynoweth, Jonathan D. Combs, Joseph K. Olivas, Beeman C. Strong, Rajshree A. Chabukswar, Ahmad Yasin, Jason W. Brandt, Ofer Levy, John M. Esper, Andreas Kleen, Christopher M. Chrulski
  • BRANCH TYPE LOGGING IN LAST BRANCH REGISTERS
    Publication number: 20200210178
    Abstract: A processor includes a counter to store a cycle count that tracks a number of cycles between retirement of a first branch instruction and retirement of a second branch instruction during execution of a set of instructions. The processor further includes a stack of registers coupled to the counter, wherein the stack of registers is to store branch type information including: a first value of the counter when the first branch instruction is retired; a second value of the counter when the second branch instruction is retired; a first type information value indicating a type of the first branch instruction; and a second type information value indicating a type of the second branch instruction.
    Type: Application
    Filed: March 6, 2020
    Publication date: July 2, 2020
    Inventors: Michael W. Chynoweth, Jonathan D. Combs, Joseph K. Olivas, Beeman C. Strong, Rajshree A. Chabukswar, Ahmad Yasin, Jason W. Brandt, Ofer Levy, John M. Esper, Andreas Kleen, Christopher M. Chrulski
  • Branch type logging in last branch registers
    Patent number: 10592244
    Abstract: An example processor that includes a decoder, an execution circuit, a counter, and a last branch recorder (LBR) register. The decoder may decode a branch instruction for a program. The execution circuit may be coupled to the decoder, where the execution circuit may execute the branch instruction. The counter may be coupled to the execution circuit, where the counter may store a cycle count. The LBR register coupled to the execution circuit, where the LBR register may include a counter field to store a first value of the counter when the branch instruction is executed and a type field to store type information indicating a type of the branch instruction.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: March 17, 2020
    Assignee: Intel Corporation
    Inventors: Michael W. Chynoweth, Jonathan D. Combs, Joseph K. Olivas, Beeman C. Strong, Rajshree A. Chabukswar, Ahmad Yasin, Jason W. Brandt, Ofer Levy, John M. Esper, Andreas Kleen, Christopher M. Chrulski
  • BRANCH TYPE LOGGING IN LAST BRANCH REGISTERS
    Publication number: 20180217839
    Abstract: An example processor that includes a decoder, an execution circuit, a counter, and a last branch recorder (LBR) register. The decoder may decode a branch instruction for a program. The execution circuit may be coupled to the decoder, where the execution circuit may execute the branch instruction. The counter may be coupled to the execution circuit, where the counter may store a cycle count. The LBR register coupled to the execution circuit, where the LBR register may include a counter field to store a first value of the counter when the branch instruction is executed and a type field to store type information indicating a type of the branch instruction.
    Type: Application
    Filed: February 2, 2017
    Publication date: August 2, 2018
    Inventors: Michael W. Chynoweth, Jonathan D. Combs, Joseph K. Olivas, Beeman C. Strong, Rajshree A. Chabukswar, Ahmad Yasin, Jason W. Brandt, Ofer Levy, John M. Esper, Andreas Kleen, Christopher M. Chrulski
  • Execution profiling mechanism
    Patent number: 9858411
    Abstract: A method comprises filtering branch trap events at a branch event filter, monitoring a branch event filter to capture indirect branch trap events that cause a control flow trap exception, receiving the indirect branch trap events at a handler and the handler processing the indirect branch trap events.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: January 2, 2018
    Assignee: INTEL CORPORATION
    Inventors: Ravi Sahita, Xiaoning Li, Barry E. Huntley, Ofer Levy, Vedvyas Shanbhogue, Yuriy Bulygin, Ido Ouziel, Michael Lemay, John M. Esper
  • Execution Profiling Mechanism
    Publication number: 20160180079
    Abstract: A method comprises filtering branch trap events at a branch event filter, monitoring a branch event filter to capture indirect branch trap events that cause a control flow trap exception, receiving the indirect branch trap events at a handler and the handler processing the indirect branch trap events
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: Ravi L. Sahita, Xiaoning Li, Barry E. Huntley, Ofer Levy, Vedvyas Shanbhogue, Yuriy Bulygin, Ido Ouziel, Michael Lemay, John M. Esper