Patents by Inventor John M. Horan

John M. Horan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160356836
    Abstract: A signal compensating high-speed data cable connects a first device to a second device. The cable comprises a signal frequency-shaping device configured to provide a signal boost in the cable, wherein an equalizer circuit in the second device receives the boosted signal and the equalizer circuit outputs a desired frequency response to conform to a desired standard. A system and method for testing high-speed data cables is also described.
    Type: Application
    Filed: June 1, 2016
    Publication date: December 8, 2016
    Inventor: John M Horan
  • Publication number: 20160356835
    Abstract: A signal compensating high-speed data cable connects a first device to a second device. The cable comprises a signal frequency-shaping device configured to provide a signal boost in the cable, wherein an equalizer circuit in the second device receives the boosted signal and the equalizer circuit outputs a desired frequency response to conform to a desired standard. A system and method for testing high-speed data cables is also described.
    Type: Application
    Filed: June 1, 2016
    Publication date: December 8, 2016
    Inventor: John M. HORAN
  • Patent number: 7248123
    Abstract: Charge from a charge pump of a PLL is dumped to a loop filter of the PLL. The dumped charge is temporarily stored in a capacitor, between the charge pump and the loop filter. A voltage of the capacitor is shifted, while temporarily storing the dumped charge. Other embodiments are also described and claimed.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: July 24, 2007
    Assignee: Ceva Services Limited
    Inventor: John M. Horan
  • Patent number: 7145400
    Abstract: A filter couples an output of a phase detector to an input of a voltage controlled oscillator. The filter has a first capacitor and a switch capacitor resistor that is in series with the first capacitor, between the first capacitor and the output of the phase detector. The switch capacitor resistor is to display a resistance that is obtained by switching back and forth a second capacitor to the first capacitor and to the phase detector output. Other embodiments are also described and claimed.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: December 5, 2006
    Assignee: Ceva Services Limited
    Inventor: John M. Horan
  • Patent number: 6512407
    Abstract: A method is described that level shifts a differential signal to produce a first signal and level shifts the logical inverse of the differential signal to produce a second signal that is the logical inverse of the first signal. The method then inverts the first signal and inverts the second signal. The method then inverts the first signal and the inverted second signal together and inverts the second signal and the inverted first signal together.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: January 28, 2003
    Assignee: Parthus Ireland Limited
    Inventors: John M. Horan, Niall O'Donovan
  • Publication number: 20020145461
    Abstract: A method is described that level shifts a differential signal to produce a first signal and level shifts the logical inverse of the differential signal to produce a second signal that is the logical inverse of the first signal. The method then inverts the first signal and inverts the second signal. The method then inverts the first signal and the inverted second signal together and inverts the second signal and the inverted first signal together.
    Type: Application
    Filed: June 27, 2001
    Publication date: October 10, 2002
    Inventors: John M. Horan, Niall O'Donovan
  • Patent number: 6462623
    Abstract: An apparatus is described comprising a current source and a pair of transistors coupled to the current source. A pair of variable loads are coupled to the pair of transistors such that a first of the pair of transistors drives a first of the pair of variable loads and a second of the pair of transistors drives a second of the pair of variable loads. Each of the pair of variable loads are coupled to a high gain input and a low gain input. Another apparatus is described comprising an oscillator having a high gain input and a low gain input. The oscillator comprises a series of inverters where each inverter output is coupled to the next inverter input in the series. At least one of the inverters comprises a current source and a pair of transistors coupled to the current source.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: October 8, 2002
    Assignee: Parthus Ireland Limited
    Inventors: John M. Horan, John G. Ryan, Mark M. Smyth, David J. Foley
  • Patent number: 6414558
    Abstract: An apparatus is described comprising a noise source coupled to an input of a gain stage. The apparatus also includes a noise shaping stage that forms a shaped noise signal by reducing 1/f noise introduced by the gain stage. The noise shaping stage has an input coupled to an output of the gain stage. The apparatus also has a decision circuit that decides whether the shaped noise signal, or a signal derived from the shaped noise signal corresponds to a 1 or a 0. A method is described that amplifies a first noise signal to produce a second noise signal. A shaped noise signal is formed by reducing 1/f noise introduced to the second noise signal by the amplifying. A random sequence is generated by comparing, against a reference, the shaped noise signal or a signal derived from the shaped noise signal.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: July 2, 2002
    Assignee: Parthus Ireland Limited
    Inventors: John G. Ryan, John M. Horan