Patents by Inventor John M. Pierce
John M. Pierce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6948645Abstract: An adjustable frame, mountable on a vehicle, for releasably securing hand trucks of different sizes and configurations includes: a support platform for receiving a base of a hand truck; a first and a second side member affixed to the platform; a first bracket and a second bracket attached to the first and second side members, respectively, the brackets extending in parallel therewith; an elongate swing bar pivotally connected to the first bracket and pivotal between a first position that retains the hand truck on the platform, and a second position, which allows access and removal of the hand truck from the platform; and a latch mounted on the swing bar. The second bracket may include a strike that engages the latch for releasably securing the swing bar in the first position. Cushioned crossbars attachable to the side members dampen vibration of the hand truck during transportation.Type: GrantFiled: May 13, 2004Date of Patent: September 27, 2005Assignee: Mickey Truck Bodies Inc.Inventors: John M. Pierce, Bill Snowa, Billie M. Bloodworth
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Publication number: 20040206794Abstract: An adjustable frame, mountable on a vehicle, for releasably securing hand trucks of different sizes and configurations includes: a support platform for receiving a base of a hand truck; a first and a second side member affixed to the platform; a first bracket and a second bracket attached to the first and second side members, respectively, the brackets extending in parallel therewith; an elongate swing bar pivotally connected to the first bracket and pivotal between a first position that retains the hand truck on the platform, and a second position, which allows access and removal of the hand truck from the platform; and a latch mounted on the swing bar. The second bracket may include a strike that engages the latch for releasably securing the swing bar in the first position. Cushioned crossbars attachable to the side members dampen vibration of the hand truck during transportation.Type: ApplicationFiled: May 13, 2004Publication date: October 21, 2004Applicant: Mickey Truck Bodies Inc.Inventors: John M. Pierce, Bill Snowa, Billie M. Bloodworth
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Patent number: 6786373Abstract: An adjustable frame, mountable on a vehicle, for releasably securing hand trucks of different sizes and configurations includes: a support platform for receiving a base of a hand truck; a first and a second side member affixed to the platform; a first bracket and a second bracket attached to the first and second side members, respectively, the brackets extending in parallel therewith; an elongate swing bar pivotally connected to the first bracket and pivotal between a first position that retains the hand truck on the platform, and a second position, which allows access and removal of the hand truck from the platform; and a latch mounted on the swing bar. The second bracket may include a strike that engages the latch for releasably securing the swing bar in the first position. Cushioned crossbars attachable to the side members dampen vibration of the hand truck during transportation.Type: GrantFiled: October 5, 2001Date of Patent: September 7, 2004Assignee: Mickey Truck Bodies, Inc.Inventors: John M. Pierce, Bill Snowa
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Patent number: 6406093Abstract: A seat assembly includes a seat structural member and a clip having first and second hook portions. The first hook portion of the clip is attached to the structural member. The seat assembly also includes a first trim material having an edge attached to the clip. Preferably, the first trim material is an elastomeric material. The seat assembly further includes a second trim material having a first edge attached to the first trim material and a second edge attached to the second hook portion.Type: GrantFiled: March 29, 2000Date of Patent: June 18, 2002Assignee: Lear CorporationInventors: Ronald L. Miotto, Kenneth R. Parrish, John M. Pierce, David R. Fabry, Benedict J. Messina, Cathy A. Sadler
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Publication number: 20020040918Abstract: An adjustable frame, mountable on a vehicle, for releasably securing hand trucks of different sizes and configurations includes: a support platform for receiving a base of a hand truck; a first and a second side member affixed to the platform; a first bracket and a second bracket attached to the first and second side members, respectively, the brackets extending in parallel therewith; an elongate swing bar pivotally connected to the first bracket and pivotal between a first position that retains the hand truck on the platform, and a second position, which allows access and removal of the hand truck from the platform; and a latch mounted on the swing bar. The second bracket may include a strike that engages the latch for releasably securing the swing bar in the first position. Cushioned crossbars attachable to the side members dampen vibration of the hand truck during transportation.Type: ApplicationFiled: October 5, 2001Publication date: April 11, 2002Inventors: John M. Pierce, Bill Snowa
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Patent number: 6008107Abstract: An integrated circuit device is fabricated upon a semi-conductor wafer by first forming a stop layer upon the surface of the wafer. Holes are formed through the stop layer and wells are formed in the semiconductor material of the semiconductor wafer below the openings. A dielectric layer is formed over the surface of the device substantially filling the wells and covering the stop layer. The dielectric layer is then planarized to substantially the level of the stop layer. A PAD oxide layer is provided between the stop layer and the surface of the semiconductor device. Conventional thin film oxidation of the wells and implants into the side walls of the wells are performed. An abrasive mechanical polisher is used to perform the planarization wherein the mechanical polisher is provided with the self-stopping feature when it encounters the stop layer.Type: GrantFiled: July 23, 1997Date of Patent: December 28, 1999Assignee: National Semiconductor CorporationInventors: John M. Pierce, Sung Tae Ahn
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Patent number: 5883010Abstract: Problems forming silicided and nonsilicided structures on the same silicon substrate are overcome utilizing a spacer oxide masking technique. A protective spacer oxide layer is deposited over the entire silicon substrate surface, and a silicide exclusion photoresist mask is selectively developed to permit etching of the spacer oxide layer in unmasked regions where silicides are expected to be formed. Areas of silicon substrate revealed by etching of the spacer oxide layer are exposed to silicide-forming metals, and these silicide-forming metals react with the silicon substrate to produce silicides. Spacer oxide remaining in masked regions prevents formation of silicides in those regions.Type: GrantFiled: August 7, 1997Date of Patent: March 16, 1999Assignee: National Semiconductor CorporationInventors: Richard B. Merrill, C. S. Teng, John M. Pierce
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Patent number: 5589412Abstract: A series of self-aligned, intermediate strips of conductive material, which contact each of the drain regions in a corresponding number of columns of drain regions in a flash electrically programmable read-only-memory (EPROM), are formed as a thick layer of planarized polysilicon. By utilizing intermediate strips of conductive material which are formed from a thick layer of polysilicon, the formation of cracks or voids in the intermediate strips of conductive material can be eliminated.Type: GrantFiled: June 1, 1995Date of Patent: December 31, 1996Assignee: National Semiconductor CorporationInventors: Ali Iranmanesh, John M. Pierce, Albert M. Bergemont
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Patent number: 5422289Abstract: A method is disclosed for forming MOSFET devices on a semiconductor substrate including steps of depositing layers of polysilicon, dielectric, and polysilicon again. Each polysilicon layer is planarized after it is deposited. The dielectric layer is patterned and etched to delineate active regions and interconnect grooves. After the second polysilicon layer is planarized, the material in the active region is patterned and etched to form a gate and source and drain areas. The appropriate areas of the active region are doped as necessary to form the source and drain.Type: GrantFiled: April 27, 1992Date of Patent: June 6, 1995Assignee: National Semiconductor CorporationInventor: John M. Pierce
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Patent number: 5302551Abstract: A method is provided for planarizing the surface of an integrated circuit over a metal interconnect layer. Metal interconnect lines and surrounding regions of a partially fabricated integrated circuit are first coated with a thin layer of dielectric substantially free of voids and then coated with a polysilicon layer. The polysilicon layer is planarized back to the level of the dielectric layer on top of the interconnects, providing a substantially planar surface for subsequent fabrication steps including deposition of a second dielectric layer and an overlying metal layer.Type: GrantFiled: May 11, 1992Date of Patent: April 12, 1994Assignee: National Semiconductor CorporationInventors: Ali Iranmanesh, John M. Pierce
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Patent number: 5287663Abstract: A polishing pad and a method for polishing semiconductor wafers. The polishing pad includes a polishing layer and a rigid layer. The rigid layer adjacent the polishing layer imparts a controlled rigidity to the polishing layer. The resilient layer adjacent the rigid layer provides substantially uniform pressure to the rigid layer. During operation, the rigid layer and the resilient layer apply an elastic flexure pressure to the polishing layer to induce a controlled flex in the polishing layer to conform to the global topography of the wafer surface while maintaining a controlled rigidity over the local topography of the wafer surface.Type: GrantFiled: April 28, 1992Date of Patent: February 22, 1994Assignee: National Semiconductor CorporationInventors: John M. Pierce, Peter H. Renteln
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Patent number: 5094972Abstract: An integrated circuit device is fabricated upon a semiconductor wafer by first forming a stop layer upon the surface of the wafer. Holes are formed through the stop layer and wells are formed in the semiconductor material of the semiconductor wafer below the openings. A dielectric layer is formed over the the surface of the device substantially filling the wells and covering the stop layer. The dielectric layer is then planarized to substantially the level of the stop layer. A PAD oxide layer is provided between the stop layer and the surface of the semiconductor device. Conventional thin film oxidation of the wells and implants into the side walls of the wells are performed. An abrasive mechanical polisher is used to perform the planarization wherein the mechanical polisher is provided with the self-stopping feature when it encounters the stop layer.Type: GrantFiled: June 14, 1990Date of Patent: March 10, 1992Assignee: National Semiconductor Corp.Inventors: John M. Pierce, Sung T. Ahn
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Patent number: 4727048Abstract: An integrated circuit structure comprises a plurality of islands of semiconductor material (16-1 through 16-5) each island being separated from adjacent islands by a groove formed in annular shape around said island to laterally define the dimensions of each such island, an oxide (12, 14) formed over the surface of said grooves (13-1 through 13-6) and said islands and a selected glass (15) deposited on said oxide (14) in the grooves and over the top surface of said device, said glass having the property that it flows at a temperature beneath the temperature at which dopants in the islands of semiconductor material substantially redistribute, said selected glass (15) having a substantially flat top surface thereby to give said structure a substantially flat top surface.Type: GrantFiled: October 2, 1986Date of Patent: February 23, 1988Assignee: Fairchild Camera & Instrument CorporationInventors: John M. Pierce, William I. Lehrer
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Patent number: 4630343Abstract: An integrated circuit structure comprises a plurality of islands of semiconductor material (16-1 through 16-5) each island being separated from adjacent islands by a groove formed in annular shape around said island to laterally define the dimensions of each such island, an oxide (12, 14) formed over the surface of said grooves (13-1 through 13-6) and said islands and a selected glass (15) deposited on said oxide (14) in the grooves and over the top surface of said device, said glass having the property that it flows at a temperature beneath the temperature at which dopants in the islands of semiconductor material substantially redistribute, said selected glass (15) having a substantially flat top surface thereby to give said structure a substantially flat top surface.Type: GrantFiled: September 6, 1985Date of Patent: December 23, 1986Assignee: Fairchild Camera & Instrument Corp.Inventors: John M. Pierce, William I. Lehrer
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Patent number: 4619844Abstract: A method of introducing a controlled flow of vapor from a high pressure sublimation chamber into a low pressure vapor deposition reactor, said vapor being derived from solid source material preferably, but not necessarily, having a vapor pressure above about one (1) Torr at a temperature not exceeding about 350.degree. C. The method comprises controllably heating the source material to a temperature sufficient to produce vapor therefrom at a desired pressure, and then controllably transferring the vapor through vapor transmission means to the vapor deposition reactor. During such transfer, the transmission means is maintained at a temperature sufficient to prevent condensation of the vapor therein during transfer. The vapor is delivered to the reactor in a pure state and is not mixed with any carrier medium.Type: GrantFiled: January 22, 1985Date of Patent: October 28, 1986Assignee: Fairchild Camera Instrument Corp.Inventors: John M. Pierce, William I. Lehrer
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Patent number: 4490737Abstract: A low temperature insulating glass for use in semiconductor devices comprises a mixture of germanium, silicon, oxygen and phosphorus. In the preferred embodiment, the glass comprises a mixture of about 40% to 55% silicon dioxide (SiO.sub.2), about 55% to 40% of germanium dioxide (GeO.sub.2) and from 1% to about 5% of phosphorus pentoxide (P.sub.2 O.sub.5), by mole percent.Type: GrantFiled: March 26, 1982Date of Patent: December 25, 1984Assignee: Fairchild Camera & Instrument Corp.Inventors: John M. Pierce, William I. Lehrer
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Patent number: 4489482Abstract: A method for impregnating copper into aluminum interconnect lines on a semiconductor device is disclosed. In a first embodiment, an interconnect pattern is formed on an aluminum layer by etching while the aluminum is substantially free from copper, and the copper is thereafter introduced to the formed interconnect lines. In a second embodiment, copper is introduced to the aluminum layer prior to formation of the desired interconnect pattern. The copper-rich layer is removed from the areas to be etched prior to etching. The method facilitates chlorine plasma etching of the aluminum which is inhibited by the presence of copper. The method is also useful with various wet etching processes where the formation of a copper-rich layer is found to stabilize the aluminum layer during subsequent processing .Type: GrantFiled: June 6, 1983Date of Patent: December 25, 1984Assignee: Fairchild Camera & Instrument Corp.Inventors: Thomas Keyser, Michael E. Thomas, John M. Pierce, James M. Cleeves
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Patent number: 4352239Abstract: A process for suppressing electromigration in conducting lines formed on integrated circuit structures includes the steps of forming the conducting lines on the integrated circuit structure and heat treating the lines to cause the average grain size in the lines to become larger than the width of the conducting lines.Type: GrantFiled: April 17, 1980Date of Patent: October 5, 1982Assignee: Fairchild Camera and InstrumentInventor: John M. Pierce
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Patent number: 4267012Abstract: A process for patterning regions on a semiconductor structure comprises the steps of forming a first layer of an alloy of tungsten and titanium on the semiconductor structure, forming a conductive layer of aluminum or chemically similar material on the surface of the tungsten-titanium alloy, removing the undesired portions of the conductive layer by etching with a plasma and removing the thereby exposed portions of the tungsten-titanium alloy layer by chemical etching.Type: GrantFiled: April 30, 1979Date of Patent: May 12, 1981Assignee: Fairchild Camera & Instrument Corp.Inventors: John M. Pierce, William I. Lehrer, Kenneth J. Radigan
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Patent number: 4221834Abstract: A relatively thin superconductive magnetic shield, as of lead, is supported from a hollow support structure, as of aluminum or fiberglass by means of a multiplicity of spots of adhesive, as of epoxy, serving to bond the superconducting shield to the support structure. The shield and support structure is then positioned within a reentrant cryostat and cooled to liquid helium temperature to render the shield superconductive. Adjacent edges of the shield material are outwardly flanged and sealed together at the flanged portions, as by welding. The spot pattern of adhesive permits the shield to flex during thermal cycling to relieve strain and prevent fracture thereof while at the same time supporting the shield in a substantially nonmicrophonic manner.Type: GrantFiled: November 17, 1975Date of Patent: September 9, 1980Assignee: Develco, Inc.Inventors: James E. Opfer, John M. Pierce, Lawrence E. Valby