Patents by Inventor John M. Powell, JR.

John M. Powell, JR. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8904205
    Abstract: In one embodiment, a processor has multiple cores to execute threads. The processor further includes a power control logic to enable entry into a turbo mode based on a comparison between a threshold and value of a counter that stores a count of core power and performance combinations that identify turbo mode requests of at least one of the threads. In this way, turbo mode may be entered at a utilization level of the processor that provides for high power efficiency. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: December 2, 2014
    Assignee: Intel Corporation
    Inventors: James S. Burns, Baskaran Ganesan, Russell J. Fenger, Devadatta V. Bodas, Sundaravarathan R. Iyengar, Feranak Nelson, John M. Powell, Jr., Suresh Sugumar
  • Patent number: 8793515
    Abstract: In one embodiment, a processor has multiple cores to execute threads. The processor further includes a power control logic to enable entry into a turbo mode based on a comparison between a threshold and value of a counter that stores a count of core power and performance combinations that identify turbo mode requests of at least one of the threads. In this way, turbo mode may be entered at a utilization level of the processor that provides for high power efficiency. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: July 29, 2014
    Assignee: Intel Corporation
    Inventors: James S. Burns, Baskaran Ganesan, Russell J. Fenger, Devadatta V. Bodas, Sundaravarathan R. Iyengar, Feranak Nelson, John M. Powell, Jr., Suresh Sugumar
  • Publication number: 20140149774
    Abstract: In one embodiment, a processor has multiple cores to execute threads. The processor further includes a power control logic to enable entry into a turbo mode based on a comparison between a threshold and value of a counter that stores a count of core power and performance combinations that identify turbo mode requests of at least one of the threads. In this way, turbo mode may be entered at a utilization level of the processor that provides for high power efficiency. Other embodiments are described and claimed.
    Type: Application
    Filed: February 3, 2014
    Publication date: May 29, 2014
    Inventors: James S. Burns, Baskaran Ganesan, Russell J. Fenger, Devadatta V. Bodas, Sundaravarathan R. Iyengar, Feranak Nelson, John M. Powell, JR., Suresh Sugumar
  • Patent number: 8683240
    Abstract: In one embodiment, a processor has multiple cores to execute threads. The processor further includes a power control logic to enable entry into a turbo mode based on a comparison between a threshold and value of a counter that stores a count of core power and performance combinations that identify turbo mode requests of at least one of the threads. In this way, turbo mode may be entered at a utilization level of the processor that provides for high power efficiency. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: March 25, 2014
    Assignee: Intel Corporation
    Inventors: James S. Burns, Baskaran Ganesan, Russell J. Fenger, Devadatta V. Bodas, Sundaravarathan R. Iyengar, Feranak Nelson, John M. Powell, Jr., Suresh Sugumar
  • Publication number: 20130179703
    Abstract: In one embodiment, a processor has multiple cores to execute threads. The processor further includes a power control logic to enable entry into a turbo mode based on a comparison between a threshold and value of a counter that stores a count of core power and performance combinations that identify turbo mode requests of at least one of the threads. In this way, turbo mode may be entered at a utilization level of the processor that provides for high power efficiency. Other embodiments are described and claimed.
    Type: Application
    Filed: February 28, 2013
    Publication date: July 11, 2013
    Inventors: James S. Burns, Baskaran Ganesan, Russell J. Fenger, Devadatta V. Bodas, Sundaravarathan R. Iyengar, Feranak Nelson, John M. Powell, JR., Suresh Sugumar
  • Publication number: 20120331310
    Abstract: In one embodiment, a processor has multiple cores to execute threads. The processor further includes a power control logic to enable entry into a turbo mode based on a comparison between a threshold and value of a counter that stores a count of core power and performance combinations that identify turbo mode requests of at least one of the threads. In this way, turbo mode may be entered at a utilization level of the processor that provides for high power efficiency. Other embodiments are described and claimed.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 27, 2012
    Inventors: James S. Burns, Baskaran Ganesan, Russell J. Fenger, Devadatta V. Bodas, Sundaravarathan R. Iyengar, Feranak Nelson, John M. Powell, JR., Suresh Sugumar