Abstract: The illustrative embodiments provide a computer implemented method and apparatus for modifying an existing circuit design. For a modification in a design of a circuit, the circuit design tool receives a code describing the modification, and a design of the circuit. The design of the circuit includes a first design, which includes a design for a number of metallic layers in the circuit. The design of the circuit further includes a second design, which includes and a design for a number of non-metallic layers in the circuit. The circuit design tool identifies a set of hooks, a set of disconnected components, and a set of filler cells in the design of the circuit. The circuit design tool produces a modification design, which is implemented in a revision of the first design, using the code, and one or more of the hooks, the disconnected components, and the filler cells.

Abstract: A method and system for using a programmable driver to dynamically adjust the path delay of a circuit. The path delay adjustment circuit in the illustrative embodiments comprises two or more latches, wherein each latch receives a signal, processes the signal, and generates an output. Compare logic connected to the latches compares the outputs to determine whether the outputs are equal. A counter connected to the compare logic increments a present state of code within the counter if the compare logic determines that the outputs are not equal. A controller connected to the counter comprises a decoder which receives the incremented code from the counter and converts the incremented code to thermometer code. The controller uses the thermometer code to adjust the drive strength of a driver of at least one of the signals.

Abstract: A bus having improved performance over prior art busses is provided. In one embodiment, the bus includes a first wire having a plurality of intervals, a second wire having a plurality of intervals, and a third wire having a plurality of intervals. The first, second, and third wires are intertwined with each other. Some intervals of the wires include a buffer and some other intervals of the wires include an inverter. In some embodiments, the intervals of the wires that include the buffer are middle wires and in other embodiments, the intervals of the wires the include the buffer are outer wires.