Patents by Inventor John MacNeil

John MacNeil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260086275
    Abstract: A method of etching a substrate to produce a plurality of surface relief diffraction gratings by providing a dielectric substrate having a mask formed on an upper surface thereof, the mask having a plurality of apertures. Further, positioning the substrate on a substrate support in a chamber of a plasma etching apparatus. Even further, positioning a Faraday cage so that an upper portion of the Faraday cage is disposed above the upper surface of the substrate and an electrical connection is maintained between the Faraday cage and the substrate support. The upper portion of the Faraday cage has a plurality of discrete regions having open areas through which the substrate can be plasma etched. Yet further, plasma etching the substrate to produce a plurality of surface relief diffraction gratings. The plurality of surface relief diffraction gratings have at least two subsets having different angles and/or orientations.
    Type: Application
    Filed: June 13, 2025
    Publication date: March 26, 2026
    Inventors: John Macneil, Laura Abis, Kevin Riddell
  • Patent number: 11643744
    Abstract: A method of processing a semiconductor wafer is provided. The method includes introducing the wafer to a main chamber via a loading port, using a transfer mechanism to transfer the wafer to a first wafer processing module in a stack so that the wafer is disposed substantially horizontally in the first wafer processing module with a front face facing upwards, and performing a processing step on the front face of the wafer in the first wafer processing module.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: May 9, 2023
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: John MacNeil, Martin Ayres, Trevor Thomas
  • Patent number: 11236433
    Abstract: An apparatus for electrochemically processing a semiconductor substrate includes a processing chamber of the type that is sealable to a peripheral portion of a semiconductor substrate so as to define a covered processing volume. The semiconductor substrate is supported by a substrate support. A magnetic arrangement is disposed outside of the processing chamber and produces a magnetic field. The magnetic field is changed using a controller for controlling the magnetic arrangement. An agitator is disposed within the processing chamber. The agitator comprises a magnetically responsive element which is responsive to changes in the magnetic field of the magnetic arrangement so as to provide a reciprocating motion to the agitator.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: February 1, 2022
    Assignee: SPTS Technologies Limited
    Inventors: Martin Ayres, John MacNeil, Trevor Thomas
  • Publication number: 20210317592
    Abstract: A method of processing a semiconductor wafer is provided. The method includes introducing the wafer to a main chamber via a loading port, using a transfer mechanism to transfer the wafer to a first wafer processing module in a stack so that the wafer is disposed substantially horizontally in the first wafer processing module with a front face facing upwards, and performing a processing step on the front face of the wafer in the first wafer processing module.
    Type: Application
    Filed: June 24, 2021
    Publication date: October 14, 2021
    Inventors: JOHN MACNEIL, MARTIN AYRES, TREVOR THOMAS
  • Patent number: 11066754
    Abstract: An apparatus for processing a front face of a semiconductor wafer is provided. The apparatus includes a main chamber, at least one loading port connected to the main chamber for introducing the wafer to the main chamber, at least one stack of wafer processing modules, and a transfer mechanism for transferring the wafer between the loading port and the processing modules. The at least one stack of wafer processing modules includes three or more substantially vertically stacked wafer processing modules, wherein adjacent wafer processing modules in the stack have a vertical separation of less than 50 cm, and each processing module is configured to process the wafer when disposed substantially horizontally therein with the front face of the wafer facing upwards, and at least one wafer processing module is an electrochemical wafer processing module.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: July 20, 2021
    Assignee: SPTS Technologies Limited
    Inventors: John Macneil, Martin Ayres, Trevor Thomas
  • Publication number: 20200325588
    Abstract: An apparatus for electrochemically processing a semiconductor substrate includes a processing chamber of the type that is sealable to a peripheral portion of a semiconductor substrate so as to define a covered processing volume. The semiconductor substrate is supported by a substrate support. A magnetic arrangement is disposed outside of the processing chamber and produces a magnetic field. The magnetic field is changed using a controller for controlling the magnetic arrangement. An agitator is disposed within the processing chamber. The agitator comprises a magnetically responsive element which is responsive to changes in the magnetic field of the magnetic arrangement so as to provide a reciprocating motion to the agitator.
    Type: Application
    Filed: April 10, 2020
    Publication date: October 15, 2020
    Inventors: Martin Ayres, John MacNeil, Trevor Thomas
  • Publication number: 20190382908
    Abstract: According to the invention there is provided a method of producing a structure comprising the steps of: a) providing a substrate comprising one or more features that correspond to the shape of the structure to be produced, wherein the one or more features comprise a hydrophobic polydimethylsiloxane (PDMS) surface; b) exposing at least a part of the hydrophobic PDMS surface to a plasma so that the part of the hydrophobic PDMS surface that is exposed to the plasma forms a hydrophilic PDMS surface; c) depositing a seed layer onto the hydrophilic PDMS surface by electroless deposition; d) depositing one or more metallic layers onto the seed layer by electrochemical deposition to form the structure; and e) removing the structure from the substrate.
    Type: Application
    Filed: June 14, 2019
    Publication date: December 19, 2019
    Inventor: John Macneil
  • Patent number: 10385471
    Abstract: According to the invention a method of removing electrolyte from an electrochemical deposition or polishing chamber comprising the steps of: providing an electrochemical deposition or polishing chamber comprising a support for a substrate, the support having an in-use position; a housing having an interior surface and a fluid outlet pathway for removing electrolyte from the chamber, wherein the fluid outlet pathway includes one or more slots which extend into the housing from at least one slotted opening formed in the interior surface; a seal for sealing the housing to a peripheral portion of a surface of a substrate position on the support in its in-use position; and a tilting mechanism for tilting the chamber in order to assist in removing electrolyte from the housing through the fluid outlet pathway; using an electrolyte to perform an electrochemical deposition or polishing processing on a substrate positioned on the support in its in-use position; and tilting the chamber using the tilting mechanism in ord
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: August 20, 2019
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventor: John Macneil
  • Publication number: 20180211856
    Abstract: An apparatus for processing a front face of a semiconductor wafer is provided. The apparatus includes a main chamber, at least one loading port connected to the main chamber for introducing the wafer to the main chamber, at least one stack of wafer processing modules, and a transfer mechanism for transferring the wafer between the loading port and the processing modules. The at least one stack of wafer processing modules includes three or more substantially vertically stacked wafer processing modules, wherein adjacent wafer processing modules in the stack have a vertical separation of less than 50 cm, and each processing module is configured to process the wafer when disposed substantially horizontally therein with the front face of the wafer facing upwards, and at least one wafer processing module is an electrochemical wafer processing module.
    Type: Application
    Filed: January 22, 2018
    Publication date: July 26, 2018
    Inventors: JOHN MACNEIL, MARTIN AYRES, TREVOR THOMAS
  • Publication number: 20180171503
    Abstract: According to the invention a method of removing electrolyte from an electrochemical deposition or polishing chamber comprising the steps of: providing an electrochemical deposition or polishing chamber comprising a support for a substrate, the support having an in-use position; a housing having an interior surface and a fluid outlet pathway for removing electrolyte from the chamber, wherein the fluid outlet pathway includes one or more slots which extend into the housing from at least one slotted opening formed in the interior surface; a seal for sealing the housing to a peripheral portion of a surface of a substrate position on the support in its in-use position; and a tilting mechanism for tilting the chamber in order to assist in removing electrolyte from the housing through the fluid outlet pathway; using an electrolyte to perform an electrochemical deposition or polishing processing on a substrate positioned on the support in its in-use position; and tilting the chamber using the tilting mechanism in ord
    Type: Application
    Filed: February 2, 2018
    Publication date: June 21, 2018
    Inventor: John MACNEIL
  • Patent number: 9945043
    Abstract: This invention relates to apparatus for electrochemical deposition onto the surface of a substrate. The apparatus includes an anode electrode 13 a support 12 for supporting the substrate 11 with its one surface 21 exposed at a location, the support 12 and the anode electrode 13 being relatively movable to alter the gap between the anode 13 and the location to define a chamber 23 between them and an electrical power source 18 with an ohmic contact to the seed layer 20 for creating a potential difference across the gap. The apparatus further includes a seal 14 for sealing with the seed layer 20 to define the fluid chamber 23; and the fluid inlet 16 and a fluid outlet 17 to the chamber 13.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: April 17, 2018
    Assignee: SPTS Technologies Limited
    Inventor: John Macneil
  • Patent number: 9903039
    Abstract: According to the invention an electrochemical deposition or polishing clamber including: a support for a substrate, the support having an in-use position; a housing having an interior surface and a fluid outlet pathway for removing an electrolyte from the chamber, wherein the fluid outlet pathway includes one or more slots which extend into the housing from at least one slotted opening formed in the interior surface; a seal for sealing the housing to a peripheral portion of a surface of a substrate position on the support in its in-use position; and a tilting mechanism for tilting the chamber in order to assist in removing electrolyte from the housing through the fluid outlet pathway.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: February 27, 2018
    Assignee: SPTS Technologies Limited
    Inventor: John MacNeil
  • Patent number: 8968535
    Abstract: This invention relates an ion beam source (10) for use with a non-electrical conducting target (14) including a grid (13) for extracting ions and a power supply for supplying pass power to the grid (13) to extract the ions.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: March 3, 2015
    Assignee: SPP Process Technology Systems UK Limited
    Inventors: John MacNeil, Paul George Bennett
  • Publication number: 20140284216
    Abstract: According to the invention an electrochemical deposition or polishing clamber including: a support for a substrate, the support having an in-use position; a housing having an interior surface and a fluid outlet pathway for removing an electrolyte from the chamber, wherein the fluid outlet pathway includes one or more slots which extend into the housing from at least one slotted opening formed in the interior surface; a seal for sealing the housing to a peripheral portion of a surface of a substrate position on the support in its in-use position; and a tilting mechanism for tilting the chamber in order to assist in removing electrolyte from the housing through the fluid outlet pathway.
    Type: Application
    Filed: March 18, 2014
    Publication date: September 25, 2014
    Applicant: PICOFLUIDICS LIMITED
    Inventor: John MACNEIL
  • Patent number: 8728337
    Abstract: A method is for processing a substrate. The method includes placing the substrate in a process volume and introducing a process gas or vapor into the process volume and/or subsequently removing gas or vapor from the volume. The step of introducing and/or removing the gas is at least partially performed by moving a movable wall to change the process volume in an appropriate sense.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: May 20, 2014
    Assignee: SPTS Technologies Limited
    Inventors: Carl Brancher, John MacNeil, Robert Trowell
  • Publication number: 20130313124
    Abstract: This invention relates to apparatus for electrochemical deposition onto the surface of a substrate. The apparatus includes an anode electrode 13 a support 12 for supporting the substrate 11 with its one surface 21 exposed at a location, the support and the anode electrode 13 being relatively movable to alter the gap between the anode 13 and the location to define a chamber between them and an electrical power source 18 with an ohmic contact to the seed layer 20 for creating a potential difference across the gap. The apparatus further includes a seal 14 for sealing with the seed layer 20 to define the fluid chamber 23; and the flu inlet 16 and a fluid outlet 17 to the chamber 13.
    Type: Application
    Filed: December 8, 2011
    Publication date: November 28, 2013
    Applicant: PICO-FLUIDICS LIMITED
    Inventor: John Macneil
  • Publication number: 20110268891
    Abstract: A gas delivery device is for use in low pressure Atomic Layer Deposition at a substrate location. The device includes a first generally elongate injector for supplying process gas to a process zone, a first exhaust zone circumjacent the process zone, and a further injector circumjacent the first exhaust gas for supplying purge or inert gas at an outlet surrounding the process zone having a wall for facing the location circumjacent the outlet to define at least a partial gas seal.
    Type: Application
    Filed: July 13, 2009
    Publication date: November 3, 2011
    Applicant: SPP PROCESS TECHNOLOGY SYSTEMS UK LIMITED
    Inventors: John MacNeil, Robert Jeffrey Bailey
  • Publication number: 20110139605
    Abstract: This invention relates an ion beam source (10) for use with a non-electrical conducting target (14) including a grid (13) for extracting ions and a power supply for supplying pass power to the grid (13) to extract the ions.
    Type: Application
    Filed: December 14, 2010
    Publication date: June 16, 2011
    Applicant: SPP PROCESS TECHNOLOGY SYSTEMS UK LIMITED
    Inventors: John MACNEIL, Paul George BENNETT
  • Patent number: 7732307
    Abstract: A modified TDEAT (tetrakisdiethylamino titanium) based MOCVD precursor for deposition of thin amorphous TiN:Si diffusion barrier layers. The TDEAT is doped with 10 at % Si using TDMAS (trisdimethlyaminosilane); the two liquids are found to form a stable solution when mixed together. Deposition occurs via pyrolysis of the vaporised precursor and NH3 on a heated substrate surface. Experimental results show that we have modified the precursor in such a way to reduce gas phase component of the deposition when compared to the unmodified TDEAT-NH3 reaction. Deposition temperatures were the range of 250-450° C. and under a range of process conditions the modified precursor shows improvements in coating conformality, a reduction in resistivity and an amorphous structure, as shown by TEM and XRD analysis. SIMS and scanning AES have shown that the film is essentially stoichiometric in Ti:N ratio and contains low levels of C (˜0.4 at %) and trace levels of incorporated Si (0.01<Si<0.5 at %).
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: June 8, 2010
    Assignee: Aviza Technology Limited
    Inventors: Stephen Robert Burgess, Andrew Price, Nicholas Rimmer, John MacNeil
  • Publication number: 20090104774
    Abstract: This invention relates to a method of manufacturing a semiconductor device. In this method, a semiconductor device is provided comprising a substrate (10), the substrate (10) being covered with a low-k precursor layer (20) having a surface (25). After this step, a partial curing step is performed in which a dense layer (30) is formed at or near the surface (25) of a low-k precursor layer (20). This dense layer (30) can act as a protective layer (30). The low-k precursor material (20) is chosen from a group of materials having the property that they are applicable in a non-cured or partially cured state. The main advantage of this method is that no separate protective layer (30) needs to be provided to the low-k precursor layer (20), because the dense layer (30) is formed out of the low-k precursor layer (20) itself. The dense layer (30) therefore has a good adhesion to the low-k precursor layer (20).
    Type: Application
    Filed: January 25, 2006
    Publication date: April 23, 2009
    Applicant: NXP B.V.
    Inventors: Yukiko Furukawa, John MacNeil