Patents by Inventor John Mallard

John Mallard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12668964
    Abstract: A passive infiltration drainage system uses a plurality of conveyance channels and plurality of infiltration tunnels to passively transport water from land surfaces to desired storage areas. The water is either deposited into the deep soil or is passed to a storage basin or outlet point.
    Type: Grant
    Filed: April 10, 2024
    Date of Patent: June 30, 2026
    Inventors: Arik Tashie, John Mallard
  • Publication number: 20240344314
    Abstract: A passive infiltration drainage system uses a plurality of conveyance channels and plurality of infiltration tunnels to passively transport water from land surfaces to desired storage areas. The water is either deposited into the deep soil or is passed to a storage basin or outlet point.
    Type: Application
    Filed: April 10, 2024
    Publication date: October 17, 2024
    Inventors: Arik Tashie, John Mallard
  • Patent number: 6195718
    Abstract: A multiple docking system allows multiple dock units to be connected to the bus of a primary unit notebook computer. This is accomplished using multiple bridges between the primary bus of the primary unit and secondary buses in each of the dock units. Importantly, the system allows for hot docking or docking of the multiple dock units to the primary unit while the primary unit is operational. It accomplishes this, however, without the latency impact associated with buffers on the primary bus. Instead, a docking signal is generated to a bridge in first dock unit as the second dock unit is docked. This causes the bridge to complete bus transactions between the primary bus and the first dock unit's secondary bus. The bridge also generates a float request signal to the primary unit and then floats the secondary bus only after receiving a float grant signal back.
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: February 27, 2001
    Assignee: Digital Equipment Corporation
    Inventors: Richard Hennessy, John Mallard
  • Patent number: 6178469
    Abstract: A computer has a processor having a bus port operatively connected to a first bus and being operative to selectively access one of a plurality of peripheral devices operatively connected to the bus via at least one of a series of identifiers. The computer also has a peripheral selector for detecting the presence of one or more of the peripheral devices operatively connected to the first and second peripheral ports, for assigning a first of the identifiers to the first peripheral port if one of the peripheral devices is operatively connected to a first peripheral port that is connected to the bus, and for assigning the same first identifier to a second peripheral port that is operatively connected to the bus if the presence of one of the peripheral devices at the first peripheral port is not detected and the presence of one of the peripheral devices at the second peripheral port is detected.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: January 23, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Rick Hennessy, David LeClair, Sanjeev Kumar, John Mallard