Patents by Inventor John Mannine Savidge Neilson

John Mannine Savidge Neilson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6215168
    Abstract: A silicon semiconductor die comprises a heavily doped silicon substrate and an upper layer comprising doped silicon of a first conductivity type disposed on the substrate. The upper layer includes an active region that comprises a well region of a second, opposite conductivity type and an edge passivation zone comprising a junction termination extension (JTE) JTE region that includes portions extending away from and extending beneath the well region. The JTE region is of varying dopant density, the dopant density being maximum at a point substantially directly beneath the junction at the upper surface of the upper layer of the JTE region with the well region. The dopant density of the JTE region decreases in both lateral directions from its maximum point, becoming less in both the portions extending away from and beneath the well region.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: April 10, 2001
    Assignee: Intersil Corporation
    Inventors: Linda Susan Brush, John Mannine Savidge Neilson