Abstract: An arrangement for providing thermal overload protection for a gated electrode power semiconductor device comprises connecting the gate electrode of the device in a series circuit between the gate electrode terminal applying a bias voltage to the gate electrode and the source region adjoining the channel region controlled by the gate electrode. The series circuit includes an electrical resistor, preferably the gate electrode itself, and a temperature sensitive element blocking current flow through the gate electrode at safe operating temperatures, but allowing current flow, for de-biasing the gate electrode by IR drop through the resistor, when excessive device temperatures are sensed. The temperature sensitive element preferably comprises a reverse biased junction or Schottky barrier formed within the gate electrode.