Abstract: A capacitor charging circuit for charging a defibrillation capacitor in a constant period of time regardless of battery voltage by employing a controlled duty cycle charging technique. The defibrillation capacitor is charged in a piecemeal manner through a transistor and flyback transformer circuit. The gate of the transistor is driven by a constant frequency pulse train inverter drive signal in which voltage is conveyed to the capacitors during one-half of the full cycle of the pulse train. The primary of the transformer is controlled by each pulse of the inverter drive signal so that the secondary of the transformer supplies current to the defibrillation capacitors during the off half cycle of the drive signal, the charge being built up in the defibrillation capacitors incrementally during the off half cycle of the inverter drive signal until the predetermined voltage is reached.

Abstract: The implantable cardioverter/pacer includes a pacer channel and a rate detect channel both receiving a cardiac signal representative of the ECG of patient. The pacing channel issues a pacing signal when the amplitude of the cardiac signal fails to exceed a first predetermined threshold within a predetermined time period. The rate detect channel has a variable gain amplifier which is controlled by an automatic gain control (AGC). The AGC increases the gain in the amplifier based upon the level of the cardiac signal applied thereto and upon the time since the last peak of the cardiac signal. A one shot receives the output of the variable gain amplifier and produces a heart rate signal. Both the pacing and the heart rate signals are applied to a microprocessor.