Abstract: System and method for a thermal and space efficient integrated circuit package. A preferred embodiment comprises a first lead frame with a first surface to which a first die is attached and a second surface external to a multi-die package, a second lead frame with a first surface to which a second die is attached, wherein the first die and the second die are arranged so that they face each other. The present invention further comprises a first plurality of pins arranged around the first lead frame and a second plurality of pins arranged around the second lead frame. Finally, a package body encapsulates the first lead frame and the second lead frame with a portion of each pin in the first plurality of pins and the second plurality of pins extending outside the package body.