Patents by Inventor John N. Schemelynce

John N. Schemelynce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiple interrupt tri-level microprocessor operating system
    Patent number: 5001666
    Abstract: A multiple interrupt tri-level microprocessor operating system (40) having particularly applicability in a two-way radio, includes an operating system that provides a background executive (47) to allow processing of time insensitive tasks, a foreground routine (24) to allow processing of real-time sensitive tasks, and a midground executive (41) to allow processing of time sensitive tasks. The midground executive (41) provides for periodic execution of preselected tasks, which tasks can all be completed within a predetermined period of time.
    Type: Grant
    Filed: October 19, 1987
    Date of Patent: March 19, 1991
    Assignee: Motorola, Inc.
    Inventors: Michael J. Thompson, Donald I. Sloan, Eric S. Goldsmith, John N. Schemelynce, Jeffrey W. Klingberg