Patents by Inventor John Ortega

John Ortega has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11912852
    Abstract: An insulated wire or cable is made by a process comprising the steps of: (A) extruding onto a covered or uncovered metal conductor or optical fiber a composition having a DF measured at 130° C. (60 Hz, 2 kV) or 120° C. (60 Hz, 8 kV) or 100° C. (60 Hz, 8 kV) of ?0.5% and comprising: (1) a high melt strength ethylene-based polymer made in a tubular reactor, and (2) a peroxide, and (B) crosslinking the high melt strength ethylene-based polymer.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: February 27, 2024
    Assignee: Dow Global Technologies LLC
    Inventors: Bharat I. Chaudhary, Christopher R. Eddy, Sarat Munjal, Kalyan Sehanobish, Hayley Brown, John O. Osby, Jose Ortega
  • Patent number: 11152084
    Abstract: Techniques for coding a medical report include identifying an acronym or abbreviation in the medical report, and a plurality of phrases not explicitly included in the medical report that are possible expanded forms of the acronym or abbreviation in the medical report. From the plurality of phrases, a most likely expanded form of the acronym or abbreviation may be selected by applying to the medical report a statistical acronym/abbreviation expansion model trained on a corpus of medical reports. By applying to the medical report with the expanded acronym or abbreviation one or more statistical fact extraction models, a clinical fact may be extracted from the medical report based at least in part on the most likely expanded form of the acronym or abbreviation in the medical report, and a corresponding medical taxonomy code may be assigned to the extracted clinical fact from the medical report.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: October 19, 2021
    Assignee: Nuance Communications, Inc.
    Inventors: Ravi Kondadadi, Girija Yegnanarayanan, Brian William Delaney, John Ortega
  • Publication number: 20180373844
    Abstract: According to some aspects, a system for automatically processing text comprising information regarding a patient encounter to assign medical codes to the text is provided. The system comprises at least one storage medium storing processor-executable instructions, and at least one processor configured to execute the processor-executable instructions to perform analyzing the text to extract a plurality of facts from the text, identifying at least one of the plurality of facts to be excluded from consideration when assigning medical codes to the text, and evaluating each of the plurality of facts, except for the identified at least one fact, to assign one or more medical codes to the text.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 27, 2018
    Inventors: Oscar Ferrandez-Escamez, Neil D. Barrett, Ravi Kondadadi, Girija Yegnanarayanan, Brian William Delaney, John Ortega
  • Publication number: 20170199963
    Abstract: Techniques for coding a medical report include identifying an acronym or abbreviation in the medical report, and a plurality of phrases not explicitly included in the medical report that are possible expanded forms of the acronym or abbreviation in the medical report. From the plurality of phrases, a most likely expanded form of the acronym or abbreviation may be selected by applying to the medical report a statistical acronym/abbreviation expansion model trained on a corpus of medical reports. By applying to the medical report with the expanded acronym or abbreviation one or more statistical fact extraction models, a clinical fact may be extracted from the medical report based at least in part on the most likely expanded form of the acronym or abbreviation in the medical report, and a corresponding medical taxonomy code may be assigned to the extracted clinical fact from the medical report.
    Type: Application
    Filed: February 16, 2016
    Publication date: July 13, 2017
    Applicant: Nuance Communications, Inc.
    Inventors: Ravi Kondadadi, Girija Yegnanarayanan, Brian William Delaney, John Ortega
  • Publication number: 20030071294
    Abstract: A method for fabricating integrated capacitors, of particular utility in forming a ferroelectric capacitor array for a ferroelectric memory integrated circuits, begins with provision of a substrate. The substrate is typically a partially-processed CMOS integrated circuit wafer coated with an adhesion layer. Upon the substrate is deposited a bottom electrode layer, typically of noble metal, a dielectric layer, typically doped PZT, and a top electrode layer, typically a noble metal oxide. Next is deposited a hardmask layer of strontium ruthenium oxide, followed by a photoresist layer. The photoresist layer is aligned, exposed, developed, and cured as known in the art of integrated circuit photolithography. The resulting stack is then dry etched to remove undesired portions of the hardmask layer, the top electrode layer, and the dielectric layer. A principle advantage of the process is that a single photomasking operation is sufficient to define the top electrode and dielectric layers.
    Type: Application
    Filed: October 30, 2002
    Publication date: April 17, 2003
    Inventors: Shan Sun, George Hickert, Diana Johnson, John Ortega, Eric Dale, Masahisa Ueda
  • Patent number: 6495413
    Abstract: A method for fabricating integrated capacitors, of particular utility in forming a ferroelectric capacitor array for a ferroelectric memory integrated circuits, begins with provision of a substrate. The substrate is typically a partially-processed CMOS integrated circuit wafer coated with an adhesion layer. Upon the substrate is deposited a bottom electrode layer, typically of noble metal, a dielectric layer, typically doped PZT, and a top electrode layer, typically a noble metal oxide. Next is deposited a hardmask layer of strontium ruthenium oxide, followed by a photoresist layer. The photoresist layer is aligned, exposed, developed, and cured as known in the art of integrated circuit photolithography. The resulting stack is then dry etched to remove undesired portions of the hardmask layer, the top electrode layer, and the dielectric layer. A principle advantage of the process is that a single photomasking operation is sufficient to define the top electrode and dielectric layers.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: December 17, 2002
    Assignees: Ramtron International Corporation, Ulvac Japan, Ltd.
    Inventors: Shan Sun, George Hickert, Diana Johnson, John Ortega, Eric Dale, Masahisa Ueda
  • Patent number: 6481947
    Abstract: The invention provides a wheeled apparatus for transporting a brake assembly and/or a tire assembly from an aircraft. The apparatus contains a slideable hollow housing which can be adjusted in height by a jack associated with the apparatus. A brake assembly can be placed within the housing for transportation or storage. On the bottom front of the housing is a stand for removing a tire assembly.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: November 19, 2002
    Inventor: John Ortega
  • Publication number: 20020117701
    Abstract: A method for fabricating integrated capacitors, of particular utility in forming a ferroelectric capacitor array for a ferroelectric memory integrated circuits, begins with provision of a substrate. The substrate is typically a partially-processed CMOS integrated circuit wafer coated with an adhesion layer. Upon the substrate is deposited a bottom electrode layer, typically of noble metal, a dielectric layer, typically doped PZT, and a top electrode layer, typically a noble metal oxide. Next is deposited a hardmask layer of strontium ruthenium oxide, followed by a photoresist layer. The photoresist layer is aligned, exposed, developed, and cured as known in the art of integrated circuit photolithography. The resulting stack is then dry etched to remove undesired portions of the hardmask layer, the top electrode layer, and the dielectric layer. A principle advantage of the process is that a single photomasking operation is sufficient to define the top electrode and dielectric layers.
    Type: Application
    Filed: February 28, 2001
    Publication date: August 29, 2002
    Inventors: Shan Sun, George Hickert, Diana Johnson, John Ortega, Eric Dale, Masahisa Ueda
  • Patent number: 6408861
    Abstract: A urine bag cleaning manifold capable of pre-mixing a cleaning solution and water for washing one or more urine bags. The bags are then rinsed and allowed to dry. The urine bag cleaning manifold is adapted for attaching to a bathroom sink faucet, bathtub faucet and other faucets for circulating the warm water from the faucet and the cleaning solution therethrough. The cleaning manifold includes a flexible inlet tube having a first end and a second end. The first end of the inlet tube is adapted for connection to the faucet. The second end of the inlet tube is attached to an inlet of a water inlet valve. An outlet of the water inlet valve is attached to a first end of an upstream mixing section. The upstream mixing section is part of a hollow manifold body. The hollow manifold body also includes a downstream discharge section. A second end of the mixing section is attached to a first end of the discharge section. A cleaning solution container is mounted on top of a cleaning solution valve.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: June 25, 2002
    Inventor: John Ortega
  • Publication number: 20020076311
    Abstract: The invention provides a wheeled apparatus for transporting a brake assembly and/or a tire assembly from an aircraft. The apparatus contains a slideable hollow housing which can be adjusted in height by a jack associated with the apparatus.
    Type: Application
    Filed: December 15, 2000
    Publication date: June 20, 2002
    Inventor: John Ortega
  • Patent number: D461517
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: August 13, 2002
    Inventors: Byron Morgan, John Ortega
  • Patent number: D598939
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: August 25, 2009
    Inventor: John Ortega
  • Patent number: D388485
    Type: Grant
    Filed: November 6, 1996
    Date of Patent: December 30, 1997
    Inventors: Byron Morgan, John Ortega
  • Patent number: D426599
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: June 13, 2000
    Inventors: Byron Morgan, John Ortega
  • Patent number: D973798
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: December 27, 2022
    Inventors: Michael Patrick Hebron, John Ortega