Abstract: A peripheral processor for a central processing unit is in the form of a memory which is repetitively loaded with data scanning an array. The processor performs predefined logical operations between respective elements of successive scans of data. Preferably address signals sent to the peripheral processor via a preassigned set of address lines specify a desired one of a plurality of predetermined logical operations. Logical operations may also be performed when data is written to processor memory as well as read from the processor. A memory shift register, for example, automatically transfers original data from present scan memory to past scan memory when new data is loaded into present scan memory.

Abstract: A clocked digital Boolean processor which responds to operation code signals and to successive single bit input (operand) signals to drive a single bit accumulator to output the successive answers of chained Boolean operations. The hardware elements are configured such that no feedback of the accumulator output (the previous answer) is required because the logic circuits determine the setting or resetting of the accumulator regardless of what the previous answer was--and yet such that the new answer represents the result of a LOAD, AND, OR or EX-OR operation performed as if the input operand and the previous answer were taken as two operands.

Abstract: A system for transmitting binary instruction or data words to or from a computer by control from a home base remote from the computer site, and characterized by the entry of signals into the computer or the extraction of signals from the computer performed by apparatus which directly connects to the computer console manual switches and indicator lights. A single telephone line forming two simultaneously active channels transmitting time-spaced pulses in opposite directions, by modems known in the art, is used as the communication link. A special purpose microcomputer directly connected to the main computer console acts figuratively to actuate the console push buttom switches in response to pulse train signals received from home base and representing single bits or multibit words. It returns to the home base a rapidly iterated and updated pulse train representative of the status of all console lights.

Abstract: A digital computer of relatively simple and efficient structural organization which is capable not only of conventional arithmetic operations according to a program but also of (i) performing chained Boolean logic processing on any selected bit of any of various selected words held in memory, (ii) using the logic processing result by storing it at any selected bit location in any of various selected words held in memory, and/or (iii) causing different, predetermined instructions within a program to have their execution dependent upon the results of previously performed single bit logic processing. The logic processing is carried out in response to specially coded instruction words which may be randomly interspersed between conventional arithmetic instruction steps within an overall program.

Abstract: An improved final servo control for numerical control systems of the type which perform linear and/or circular interpolation by iterative updating of commanded position signals. The improvements are embodied in means to sense when the servo loop has had an offset error introduced by drift or aging of the final amplifier or similar components, together with means for progressively and automatically removing such error; and by means to avoid attempts at extreme acceleration or deceleration beyond the ability of the servo power element (motor) to accomplish, --by creating from an iteratively updated primary position command signal, whose rate of change may suddenly alter by a wide margin, a secondary position command signal which varies ultimately by the same amount but at a lesser rate of change.