Patents by Inventor John P. Curcio

John P. Curcio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for generating layouts by chamfering corners of polygons
    Patent number: 7185302
    Abstract: A method for generating a layout of a semiconductor circuit to satisfy minimum spacing requirements that includes generating one or more polygons for the layout, with each generated polygon having an area, a plurality of corners and satisfying the minimum spacing requirements of the layout rules. The corners of the generated polygon are then chamfered, and the generated polygon with chamfered corners is expanded or reduced in size.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: February 27, 2007
    Assignee: Polar Semiconductor, Inc.
    Inventors: John C. Beckman, John P. Curcio