Patents by Inventor John P. Dirner

John P. Dirner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10922208
    Abstract: Systems and methods validate the operation of a component of an executable model without inadvertently altering the behavior of the component. The model may be partitioned into a design space and a verification space. The component may be placed in the design space, while an observer for validating the component may be placed in the verification space, and linked to the component. During execution of the model, input or output values for the component may be computed and buffered. Execution of the observer may follow execution of the component. The input or output values may be read out of the buffer, and utilized during execution of validation functionality defined for the observer. Model compilation operations that may inadvertently alter the behavior of the component, such as back propagation of attributes, are blocked between the observer and the component.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: February 16, 2021
    Assignee: The MathWorks, Inc.
    Inventors: Mahesh Nanjundappa, S. M. Shahed Nejhum, Vijaya Raghavan, Krishna Balasubramanian, John P. Dirner
  • Patent number: 10684936
    Abstract: Systems and methods validate the operation of a component of an executable model without inadvertently altering the behavior of the component. The model may be partitioned into a design space and a verification space. The component may be placed in the design space, while an observer for validating the component may be placed in the verification space, and linked to the component. During execution of the model, input or output values for the component may be computed and buffered. Execution of the observer may follow execution of the component. The input or output values may be read out of the buffer, and utilized during execution of validation functionality defined for the observer. Model compilation operations that may inadvertently alter the behavior of the component, such as back propagation of attributes, are blocked between the observer and the component.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 16, 2020
    Assignee: The MathWorks, Inc.
    Inventors: Mahesh Nanjundappa, S. M. Shahed Nejhum, Vijaya Raghavan, Krishna Balasubramanian, John P. Dirner
  • Publication number: 20200050533
    Abstract: Systems and methods validate the operation of a component of an executable model without inadvertently altering the behavior of the component. The model may be partitioned into a design space and a verification space. The component may be placed in the design space, while an observer for validating the component may be placed in the verification space, and linked to the component. During execution of the model, input or output values for the component may be computed and buffered. Execution of the observer may follow execution of the component. The input or output values may be read out of the buffer, and utilized during execution of validation functionality defined for the observer. Model compilation operations that may inadvertently alter the behavior of the component, such as back propagation of attributes, are blocked between the observer and the component.
    Type: Application
    Filed: September 11, 2018
    Publication date: February 13, 2020
    Inventors: Mahesh Nanjundappa, S.M. Shahed Nejhum, Vijaya Raghavan, Krishna Balasubramanian, John P. Dirner
  • Publication number: 20190370155
    Abstract: Systems and methods validate the operation of a component of an executable model without inadvertently altering the behavior of the component. The model may be partitioned into a design space and a verification space. The component may be placed in the design space, while an observer for validating the component may be placed in the verification space, and linked to the component. During execution of the model, input or output values for the component may be computed and buffered. Execution of the observer may follow execution of the component. The input or output values may be read out of the buffer, and utilized during execution of validation functionality defined for the observer. Model compilation operations that may inadvertently alter the behavior of the component, such as back propagation of attributes, are blocked between the observer and the component.
    Type: Application
    Filed: May 30, 2019
    Publication date: December 5, 2019
    Inventors: Mahesh Nanjundappa, S. M. Shahed Nejhum, Vijaya Raghavan, Krishna Balasubramanian, John P. Dirner
  • Patent number: 10318653
    Abstract: Systems and methods automatically construct a harness model having a selected component from source model. The systems and methods determine an execution context of the component in the source model, and construct and configure the harness model to provide the same or an equivalent execution context in the harness model. Model elements may be added to the harness model, and the model elements may be configured to replicate the execution context. The harness model may be executed, and the operation of the component evaluated. Changes to the component are synchronized between the source model and the harness model, as are changes to the component's execution context. Assessment operations may be included in the harness model, and these assessment operations may be evaluated when the harness model is executed. A verification report that includes the results of the assessments may be generated.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: June 11, 2019
    Assignee: The MathWorks, Inc.
    Inventors: Yit Phang Khoo, John P. Dirner, S. M. Shahed Nejhum, Gregg P. Smith, Vijaya Raghavan, Kalyan Bemalkhedkar, Krishna Balasubramanian
  • Patent number: 9411559
    Abstract: A device may receive a chart generated via a technical computing environment, where the chart includes a textual portion and a graphical portion, and the graphical portion includes state information. The device may parse the chart into the textual portion and the graphical portion, and may process the textual portion with a textual engine of the technical computing environment to generate textual results. The device may process the graphical portion with a graphical engine of the technical computing environment to generate graphical results, and may combine the textual results with the graphical results to generate chart results. The device may output or store the chart results.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: August 9, 2016
    Assignee: The MathWorks, Inc.
    Inventors: Srinath Avadhanula, Pieter J. Mosterman, Yit Phang Khoo, John P. Dirner, Krishna Balasubramanian, Ebrahim Mestchian
  • Publication number: 20140359566
    Abstract: A device may receive a chart generated via a technical computing environment, where the chart includes a textual portion and a graphical portion, and the graphical portion includes state information. The device may parse the chart into the textual portion and the graphical portion, and may process the textual portion with a textual engine of the technical computing environment to generate textual results. The device may process the graphical portion with a graphical engine of the technical computing environment to generate graphical results, and may combine the textual results with the graphical results to generate chart results. The device may output or store the chart results.
    Type: Application
    Filed: May 23, 2014
    Publication date: December 4, 2014
    Applicant: The MathWorks, Inc.
    Inventors: Srinath AVADHANULA, Pieter J. MOSTERMAN, Yit Phang KHOO, John P. DIRNER, Krishna BALASUBRAMANIAN, Ebrahim Mestchian
  • Patent number: 7638874
    Abstract: A microelectronic package, a method of forming the package and a system incorporating the package. The package includes a substrate; a die bonded to the substrate; and a thermal sensor connected to the substrate.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: December 29, 2009
    Assignee: Intel Corporation
    Inventors: Chia-Pin Chiu, John P. Dirner
  • Publication number: 20070296071
    Abstract: A microelectronic package, a method of forming the package and a system incorporating the package. The package includes a substrate; a die bonded to the substrate; and a thermal sensor connected to the substrate.
    Type: Application
    Filed: June 23, 2006
    Publication date: December 27, 2007
    Inventors: Chia-Pin Chiu, John P. Dirner