Patents by Inventor John P. Edward

John P. Edward has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9437688
    Abstract: A GaN HFET includes a silicon substrate with an Al2O3 layer above the silicon substrate. The Al2O3 layer has voids formed therein. A plurality of alternating GaN and AlN layers are above the Al2O3 layer. The GaN and AlN layers are under continuous compressive stress.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: September 6, 2016
    Assignee: Power Integrations, Inc.
    Inventors: Jamal Ramdani, John P. Edwards, Linlin Liu
  • Publication number: 20150364552
    Abstract: A GaN HFET includes a silicon substrate with an Al2O3 layer above the silicon substrate. The Al2O3 layer has voids formed therein. A plurality of alternating GaN and AlN layers are above the Al2O3 layer. The GaN and AlN layers are under continuous compressive stress.
    Type: Application
    Filed: August 24, 2015
    Publication date: December 17, 2015
    Inventors: Jamal Ramdani, John P. Edwards, Linlin Liu
  • Patent number: 9147734
    Abstract: Substrates of GaN over silicon suitable for forming electronics devices such as heterostructure field effect transistors (HFETs), and methods of making the substrates, are disclosed. Voids in a crystalline Al2O3 film on a top surface of a silicon wafer are formed. The top surface of the silicon wafer is along the <111> silicon crystal orientation. A plurality of laminate layers is deposited over the voids and the Al2O3 film. Each laminate layer includes an AlN film and a GaN film. A transistor or other device may be formed in the top GaN film.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: September 29, 2015
    Assignee: Power Integrations, Inc.
    Inventors: Jamal Ramdani, John P. Edwards, Linlin Liu
  • Publication number: 20140374768
    Abstract: Substrates of GaN over silicon suitable for forming electronics devices such as heterostructure field effect transistors (HFETs), and methods of making the substrates, are disclosed. Voids in a crystalline Al2O3 film on a top surface of a silicon wafer are formed. The top surface of the silicon wafer is along the <111> silicon crystal orientation. A plurality of laminate layers is deposited over the voids and the Al2O3 film. Each laminate layer includes an AlN film and a GaN film. A transistor or other device may be formed in the top GaN film.
    Type: Application
    Filed: April 18, 2014
    Publication date: December 25, 2014
    Applicant: POWER INTEGRATIONS, INC.
    Inventors: Jamal RAMDANI, John P. EDWARDS, Linlin LIU
  • Patent number: 8703561
    Abstract: Substrates of GaN over silicon suitable for forming electronics devices such as heterostructure field effect transistors (HFETs), and methods of making the substrates, are disclosed. Voids in a crystalline Al2O3 film on a top surface of a silicon wafer are formed. The top surface of the silicon wafer is along the <111> silicon crystal orientation. A plurality of laminate layers is deposited over the voids and the Al2O3 film. Each laminate layer includes an AN film and a GaN film. A transistor or other device may be formed in the top GaN film.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: April 22, 2014
    Assignee: Power Integrations, Inc.
    Inventors: Jamal Ramdani, John P. Edwards, Linlin Liu
  • Publication number: 20130330888
    Abstract: Methods and apparatuses are disclosed for providing heterostructure field effect transistors (HFETs) with high-quality gate dielectric and field plate dielectric. The gate dielectric and field plate dielectric are in situ deposited on a semiconductor surface. The location of the gate electrode may be defined by etching a first pattern in the field plate dielectric and using the gate dielectric as an etch-stop. Alternatively, an additional etch-stop layer may be in situ deposited between the gate dielectric and the field plate dielectric. After etching the first pattern, a conductive material may be deposited and patterned to define the gate electrode. Source and drain electrodes that electrically contact the semiconductor surface are formed on opposite sides of the gate electrode.
    Type: Application
    Filed: August 9, 2013
    Publication date: December 12, 2013
    Applicant: POWER INTEGRATIONS, INC.
    Inventors: John P. EDWARDS, Linlin LIU
  • Publication number: 20130302972
    Abstract: Substrates of GaN over silicon suitable for forming electronics devices such as heterostructure field effect transistors (HFETs), and methods of making the substrates, are disclosed. Voids in a crystalline Al2O3 film on a top surface of a silicon wafer are formed. The top surface of the silicon wafer is along the <111> silicon crystal orientation. A plurality of laminate layers is deposited over the voids and the Al2O3 film. Each laminate layer includes an AN film and a GaN film. A transistor or other device may be formed in the top GaN film.
    Type: Application
    Filed: July 17, 2013
    Publication date: November 14, 2013
    Inventors: Jamal RAMDANI, John P. EDWARDS, Linlin LIU
  • Patent number: 8507947
    Abstract: Substrates of GaN over silicon suitable for forming electronics devices such as heterostructure field effect transistors (HFETs), and methods of making the substrates, are disclosed. Voids in a crystalline Al2O3 film on a top surface of a silicon wafer are formed. The top surface of the silicon wafer is along the <111> silicon crystal orientation. A plurality of laminate layers is deposited over the voids and the Al2O3 film. Each laminate layer includes an AlN film and a GaN film. A transistor or other device may be formed in the top GaN film.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: August 13, 2013
    Assignee: Power Integrations, Inc.
    Inventors: Jamal Ramdani, John P. Edwards, Linlin Liu
  • Publication number: 20130146863
    Abstract: Substrates of GaN over silicon suitable for forming electronics devices such as heterostructure field effect transistors (HFETs), and methods of making the substrates, are disclosed. Voids in a crystalline Al2O3 film on a top surface of a silicon wafer are formed. The top surface of the silicon wafer is along the <111> silicon crystal orientation. A plurality of laminate layers is deposited over the voids and the Al2O3 film. Each laminate layer includes an AlN film and a GaN film. A transistor or other device may be formed in the top GaN film.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 13, 2013
    Inventors: Jamal RAMDANI, John P. Edwards, Linlin Liu
  • Publication number: 20130146943
    Abstract: Methods and apparatuses are disclosed for providing heterostructure field effect transistors (HFETs) with high-quality gate dielectric and field plate dielectric. The gate dielectric and field plate dielectric are in situ deposited on a semiconductor surface. The location of the gate electrode may be defined by etching a first pattern in the field plate dielectric and using the gate dielectric as an etch-stop. Alternatively, an additional etch-stop layer may be in situ deposited between the gate dielectric and the field plate dielectric. After etching the first pattern, a conductive material may be deposited and patterned to define the gate electrode. Source and drain electrodes that electrically contact the semiconductor surface are formed on opposite sides of the gate electrode.
    Type: Application
    Filed: December 12, 2011
    Publication date: June 13, 2013
    Inventors: John P. EDWARDS, Linlin Liu
  • Patent number: 5259060
    Abstract: A color-coded hermetically coated optical waveguide, consisting of glass optical fiber incorporating a light-absorbing hermetic coating but exhibiting improved color stability and differentiability, is produced by interposing a pigmented white opaque polymer coating exteriorly of the hermetic coating and interiorly of the color coding ink, the pigmented coating operating both to mask the hermetic coating and to accentuate the brightness of the ink color.
    Type: Grant
    Filed: August 11, 1992
    Date of Patent: November 2, 1993
    Assignee: Corning Incorporated
    Inventors: John P. Edward, Robin J. MacKinnon