Abstract: An image sensor includes a substrate; a plurality of pixels on the substrate, one or more of the pixels comprises (i) first and second charge-storage regions having at least one photosensitive area; (ii) a lateral overflow drain; (iii) a first lateral overflow gate adjacent the first charge-storage regions that passes substantially all charges from the first charge-storage region to the lateral overflow drain; and (iv) a second lateral gate adjacent the second charge-storage region that passes excess photo-generated charge into the lateral overflow drain for blooming control.

Abstract: A method for calibrating an image sensor having multiple outputs, the method includes the steps of capturing an image on the image sensor, injecting one or more substantially identical pairs of signals into corresponding portions of the captured image, reading out the captured image with the injected signals into two or more outputs, and comparing two substantially identical signals from corresponding portions of the image, which comparison is used for calibrating the image.

Abstract: A method for reducing shutter latency while maintaining low dark current in the imager and minimizing energy consumption in a digital camera, the method including the steps of providing an imager operating in accumulation mode; and substantially continuous flushing of charges from the imager before capturing an exposure of an image with a time between vertical transfers greater than or equal to time between vertical transfers during normal image readout so that, if continuous flushing for a time necessary to readout substantially all rows of pixels has occurred, the exposure may be captured with substantially zero latency.

Abstract: A digital camera includes a CCD operating with accumulation mode clocking for capturing an electronic representation of an image; and two or more clocks operatively and respectively connected to each phase of the two or more phases for initiating flushing of excess current, wherein, to initiate flushing, a time the clocks are at a high level are substantially the same, and a time the clocks are at a low level can be selected at any duration between a minimum width at which dark current starts to substantially increase and twice its normal operating duration during image readout and for reducing power consumption while retaining minimum dark current and for having a substantially uniform dark field.

Abstract: An optically operated test structure for testing the charge transfer efficiency (CTE) of a charge coupled device (CCD) solid-state image sensor. A solid-state image sensor includes a substrate of a semiconductor material of one conductivity type having a surface. A plurality of spaced, parallel CCDs are in the substrate at the surface. Each CCD includes a channel region and a plurality of conductive gates extending across and insulated from the channel region. The conductive gates extend laterally across the channel regions of all of the CCDs and divide the channel regions into a plurality of phases and pixels. A drain region of the opposite conductivity type is in the substrate at the surface and extends along the channel region of at least one of the CCDs. A simply connected (rectangular) region of the plurality of spaced, parallel CCDs is photoactive. The CCDs outside this photoactive region are typically covered with metal or some other optically opaque material.

Abstract: A method for reducing shutter latency while maintaining low dark current in the imager and minimizing energy consumption in a digital camera, the method including the steps of providing an imager operating in accumulation mode; and substantially continuous flushing of charges from the imager before capturing an exposure of an image with a time between vertical transfers greater than or equal to time between vertical transfers during normal image readout so that, if continuous flushing for a time necessary to readout substantially all rows of pixels has occurred, the exposure may be captured with substantially zero latency.

Abstract: A digital camera includes a CCD operating with accumulation mode clocking for capturing an electronic representation of an image; and two or more clocks operatively and respectively connected to each phase of the two or more phases for initiating flushing of excess current, wherein, to initiate flushing, a time the clocks are at a high level are substantially the same, and a time the clocks are at a low level can be selected at any duration between a minimum width at which dark current starts to substantially increase and twice its normal operating duration during image readout and for reducing power consumption while retaining minimum dark current and for having a substantially uniform dark field.

Abstract: An optically operated test structure for testing the charge transfer efficiency (CTE) of a charge coupled device (CCD) solid-state image sensor. A solid-state image sensor includes a substrate of a semiconductor material of one conductivity type having a surface. A plurality of spaced, parallel CCDs are in the substrate at the surface. Each CCD includes a channel region and a plurality of conductive gates extending across and insulated from the channel region. The conductive gates extend laterally across the channel regions of all of the CCDs and divide the channel regions into a plurality of phases and pixels. A drain region of the opposite conductivity type is in the substrate at the surface and extends along the channel region of at least one of the CCDs.

Abstract: A laser diode having an output facet and a back facet is placed in contact with a designated edge of a die and oriented such that said output facet is substantially parallel to said top surface of said die. At least one photodetector is fabricated on the dye top surface.