Abstract: Technologies for verifying operations of software components include a device with a processor and a memory coupled with the processor, the memory including instructions that, when executed by the processor cause the processor to obtain design data indicative of a model of interconnected components of a software system. The instructions also cause the processor to obtain test sequence data indicative of rules pertaining to a sequence of messages to be communicated between a target component of the software system and one or more other components of the model defined in the design data. Further, the instructions cause the processor to perform, in a test environment that emulates the model in which the target component is defined, a set of verification operations to determine a response of the target component to one or more messages generated as a function of the test sequence data.