Abstract: An electronic apparatus for improving skills in reflex, speed and accuracy of the player as well as for recreational purposes is disclosed in which multiple targets spread around the player are selected with random sequence by an electronic device. The selections of targets are indicated by the visual indicators as well as an audio alarm on the electronic device. When the targets are selected, a timer on the electronic device is activated and the elapsed time is indicated by a display on the electronic device. The timer is halted when the targets are hit by the player. The indicators are then disabled and the elapsed time which measures the performance of the player is indicated by the display on the electronic device. The speed of target selection preceded by fake target selections is provided to improve player's reflex.

Abstract: A digital phase correlator compares the relative phase of two or more high-frequency clocks and corrects for any detected phase difference. The phase detector includes a pair of flip-flops whose output is an indication of which of the two clock pulses is leading the other. The output of the flip-flop controls, through a circuit including a rotating shift register and a multitap delay line, the delay introduced to one of the clocks in a manner such that the phase difference between the clocks is reduced to a minimum.

Abstract: A plurality of differently coded component tags are attached to a plurality of components maintained in a storage location. The component tag codes are stored in a master tag which can be interrogated by a coded interrogation signal to identify the tagged components.

Abstract: Binary data is transmitted as signals of two different pulsewidths to respectively represent logic "0" and "1". At the data receiver, the ratio of the pulsewidths is converted into a corresponding voltage ratio, which, in turn, is applied through a voltage divider to develop clock- and data-control signals at two different levels. Switching devices are respectively actuated whenever the clock- and data-control signals reach preset voltage levels to respectively produce self-synchronized clock and data pulses corresponding to the received binary data.