Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Abstract: A transistor device includes a first conductivity type drift layer, a second conductivity type first region in the drift layer, a body layer having the second conductivity type on the drift layer including the first region, a source layer on the body layer, and a body contact region that extends through the source layer and the body layer and into the first region. The transistor device further includes a trench through the source layer and the body layer and extending into the drift layer adjacent the first region. The trench has an inner sidewall facing away from the first region. A gate insulator is on the inner sidewall of the trench, and a gate contact is on the gate insulator.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type and an upper surface, forming first regions in the drift layer and adjacent the upper surface, the first regions having a second conductivity type that is opposite the first conductivity type and being spaced apart from one another, forming a body layer on the drift layer including the source regions, forming spaced apart source regions in the body layer above respective ones of the first regions, forming a vertical conduction region in the body layer between the source regions, the vertical conduction region having the first conductivity type and defining channel regions in the body layer between the vertical conduction region and respective ones of the source regions, forming a gate insulator on the body layer, and forming a gate contact on the gate insulator.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Abstract: A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Abstract: A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region. The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.

Abstract: A transistor device includes a drift layer having a first conductivity type, a body layer on the drift layer, the body layer having a second conductivity type opposite the first conductivity type, and a source region on the body layer, the source region having the first conductivity type. The device further includes a trench extending through the source region and the body layer and into the drift layer, a channel layer on the inner sidewall of the trench, the channel layer having the second conductivity type and having an inner sidewall opposite an inner sidewall of the trench, a gate insulator on the inner sidewall of the channel layer, and a gate contact on the gate insulator.

Abstract: A transistor device includes a first conductivity type drift layer, a second conductivity type first region in the drift layer, a body layer having the second conductivity type on the drift layer including the first region, a source layer on the body layer, and a body contact region that extends through the source layer and the body layer and into the first region. The transistor device further includes a trench through the source layer and the body layer and extending into the drift layer adjacent the first region. The trench has an inner sidewall facing away from the first region. A gate insulator is on the inner sidewall of the trench, and a gate contact is on the gate insulator.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type and an upper surface, forming first regions in the drift layer and adjacent the upper surface, the first regions having a second conductivity type that is opposite the first conductivity type and being spaced apart from one another, forming a body layer on the drift layer including the source regions, forming spaced apart source regions in the body layer above respective ones of the first regions, forming a vertical conduction region in the body layer between the source regions, the vertical conduction region having the first conductivity type and defining channel regions in the body layer between the vertical conduction region and respective ones of the source regions, forming a gate insulator on the body layer, and forming a gate contact on the gate insulator.

Abstract: A transistor device includes a drift layer having a first conductivity type, a body layer on the drift layer, the body layer having a second conductivity type opposite the first conductivity type, and a source region on the body layer, the source region having the first conductivity type. The device further includes a trench extending through the source region and the body layer and into the drift layer, a channel layer on the inner sidewall of the trench, the channel layer having the second conductivity type and having an inner sidewall opposite an inner sidewall of the trench, a gate insulator on the inner sidewall of the channel layer, and a gate contact on the gate insulator.

Abstract: A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.

Abstract: A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.

Abstract: A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.

Abstract: High voltage silicon carbide (SiC) devices, for example, thyristors, are provided. A first SiC layer having a first conductivity type is provided on a first surface of a voltage blocking SiC substrate having a second conductivity type. A first region of SiC is provided on the first SiC layer and has the second conductivity type. A second region of SiC is provided in the first SiC layer, has the first conductivity type and is adjacent to the first region of SiC. A second SiC layer having the first conductivity type is provided on a second surface of the voltage blocking SiC substrate. A third region of SiC is provided on the second SiC layer and has the second conductivity type. A fourth region of SiC is provided in the second SiC layer, has the first conductivity type and is adjacent to the third region of SiC. First and second contacts are provided on the first and third regions of SiC, respectively. Related methods of fabricating high voltage SiC devices are also provided.

Abstract: Silicon carbide high voltage semiconductor devices and methods of fabricating such devices are provided. The devices include a voltage blocking substrate. Insulated gate bipolar transistors are provided that have a voltage blocking substrate. Planar and beveled edge termination may be provided.