Patents by Inventor John Patrick Jones
John Patrick Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190015415Abstract: The disclosure provides methods for treating psychiatric diseases, such as schizophrenia, in patients with certain gene polymorphisms using antipsychotic drugs, such as risperidone and paliperidone.Type: ApplicationFiled: August 10, 2018Publication date: January 17, 2019Inventors: Zacharoula Konsoula, John Patrick Jones, Philip Twumasi-Ankrah, Christian Heidbreder, Azmi Nasser
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Patent number: 8054853Abstract: The present invention provides systems and methods for supporting native TDM and native Packet switching simultaneously in a meshed switching architecture. Specifically with the present invention, the meshed links are common to both TDM and packet traffic, and both types terminate to a common system interface without the need to separate physical resources and infrastructure; the common termination function has access to both the TDM (Time Slot Interchange (TSI)) switching and packet switching elements. Native TDM switching and packet switching operate in concurrently in the mesh over common links, with the personality of the links derived by the card type (attached to the mesh). In this, a given card or slot in a system can communicate in the native format to both packet based cards (slots) or TDM based cards (slots) simultaneously with no preconceived restrictions or limitations on slot or link definition.Type: GrantFiled: April 30, 2007Date of Patent: November 8, 2011Assignee: Ciena CorporationInventors: John Patrick Jones, Timothy L. Norman, Alan Chin-Luen Chan
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Patent number: 7468991Abstract: Synchronous timing techniques provide redundant reference frequencies to enable a packet switching system to continuously generate one or more master clock frequencies when an original reference frequency is lost or unavailable.Type: GrantFiled: March 17, 2003Date of Patent: December 23, 2008Assignee: Alcatel-Lucent USA Inc.Inventors: Frank Bradbury, John Patrick Jones, Douglas MacIntyre, Raymond Schmidt, Scott Whitney
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Patent number: 7428208Abstract: Multi-service telecommunication switches which include enhanced component redundancy and which also allow multiple chassis connections to a switching fabric enhance the likelihood that packets transmitted to and from the switch will not be lost due do a particular component failure and also enable chassis stacking in a rack system. Such a multi-service telecommunication switch includes redundant physical layer adapter cards, redundant service cards, redundant timing modules, and redundant switching fabrics. Further, the multi-service telecommunication switch, includes an enhanced data flow distribution (load-balancing) architecture which enables multiple chassis connections to the switching fabrics.Type: GrantFiled: October 21, 2002Date of Patent: September 23, 2008Assignee: Ciena CorporationInventors: John Patrick Jones, Michael Paul Demilia, Ronald Mark Parker, Mehmet Hakan Duymazlar
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Publication number: 20080181203Abstract: The present invention provides systems and methods for supporting native TDM and native Packet switching simultaneously in a meshed switching architecture. Specifically with the present invention, the meshed links are common to both TDM and packet traffic, and both types terminate to a common system interface without the need to separate physical resources and infrastructure; the common termination function has access to both the TDM (Time Slot Interchange (TSI)) switching and packet switching elements. Native TDM switching and packet switching operate in concurrently in the mesh over common links, with the personality of the links derived by the card type (attached to the mesh). In this, a given card or slot in a system can communicate in the native format to both packet based cards (slots) or TDM based cards (slots) simultaneously with no preconceived restrictions or limitations on slot or link definition.Type: ApplicationFiled: April 30, 2007Publication date: July 31, 2008Inventors: John Patrick Jones, Timothy L. Norman, Alan Chin-Luen Chan
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Patent number: 7180867Abstract: A methodology is provided for fault detection and service restoration in a multiservice switch on a per flow basis. An ingress source transmits the same data over each of two redundant cores. An egress receiver selects on a per flow bass which core to utilize. Bi-directional flows are not necessarily grouped together. The basic approach to fault detection is to assume that the two cores are not in lock step, but that the shelves are continually monitoring link flows for control path data as well as user data. The path monitoring is accomplished using a combination of arbiter and aggregator functions found in the service shelves and core interface cards, respectively. The arbiter transmits link test cells to both cores on a per flow basis, wherein the link test cells traverse and are monitored by respective aggregators to and from each core. When an egress arbiter determines that a flow is bad, it initiates a switch to the alternative source core, from which the flow would continue.Type: GrantFiled: December 26, 2000Date of Patent: February 20, 2007Assignee: Lucent Technologies Inc.Inventors: Thomas A Hoch, John Patrick Jones, Andrew A Long, Prasasth R Palnati, Ronald M Parker, Raymond J Schmidt
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Patent number: 7058010Abstract: The present invention is a methodology for controlled switchover of unicast and multicast data flows in packet based switching system. In some cases it is advantageous to purposefully support switchover of flows from one path to the other without causing loss of data. This is termed a “controlled” or “hitless” switchover. In accordance with the present invention switchover methodology, given that an ingress arbiter device is transmitting to both cores simultaneously, it is required that the flows to both switching cores be synchronized at an aggregator level and that an egress arbiter be given time to cease receiving packets from one Core then switch over to the other Core, and continue receiving packets.Type: GrantFiled: March 29, 2001Date of Patent: June 6, 2006Assignee: Lucent Technologies Inc.Inventors: P K Chidambaran, Thomas A Hoch, John Patrick Jones, Andrew A Long, Prasasth R Palnati, Raymond J Schmidt
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Patent number: 6894969Abstract: The present invention is a core interface mechanism that permits 1:N type port protection on the core side of the switch such that core bandwidth is not wasted by the direct connection of service cards to the switching core. In an exemplary embodiment, a core interface module supports up to two active service cards and one dedicated protection service card. To provide increased efficiency and lower cost the redundant service card does not strand user bandwidth in the switch core. In an exemplary embodiment, the core interface includes a plurality of core side input and output ports for coupling to the switching core and a plurality of card side input and output ports for coupling to the service cards. A data flow switch function couples between the core side ports and the card side ports. The data flow switch function operates to complete data flow paths between the core side ports and the card side ports.Type: GrantFiled: November 14, 2000Date of Patent: May 17, 2005Assignee: Lucent Technologies Inc.Inventors: P K Chidambaran, Thomas A Hoch, John Patrick Jones, Andrew A Long, Prasasth R Palnati, Ronald M Parker, Raymond J Schmidt
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Publication number: 20040184485Abstract: Synchronous timing techniques provide redundant reference frequencies to enable a packet switching system to continuously generate one or more master clock frequencies when an original reference frequency is lost or unavailable.Type: ApplicationFiled: March 17, 2003Publication date: September 23, 2004Inventors: Frank Bradbury, John Patrick Jones, Douglas MacIntyre, Raymond Schmidt, Scott Whitney
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Publication number: 20030081540Abstract: Multi-service telecommunication switches which include enhanced component redundancy and which also allow multiple chassis connections to a switching fabric enhance the likelihood that packets transmitted to and from the switch will not be lost due do a particular component failure and also enable chassis stacking in a rack system. Such a multi-service telecommunication switch includes redundant physical layer adapter cards, redundant service cards, redundant timing modules, and redundant switching fabrics. Further, the multi-service telecommunication switch, includes an enhanced data flow distribution (load-balancing) architecture which enables multiple chassis connections to the switching fabrics.Type: ApplicationFiled: October 21, 2002Publication date: May 1, 2003Applicant: WaveSmith Networks, Inc.Inventors: John Patrick Jones, Michael Paul Demilia, Ronald Mark Parker, Mehmet Hakan Duymazlar
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Publication number: 20030002505Abstract: A packet-based switching device includes a plurality of physical layer interfaces, such as SONET/SDH layer 1 interfaces, and one or more higher-layer processors, such as SONET/SDH layer 2 or 3 processors. One or more digital cross-connects are interposed between the physical layer interfaces and the higher-layer processors. Each digital cross-connect routes communications traffic between the physical layer interfaces and the higher-layer processors. A packet switch core, such as an asynchronous transfer mode (ATM) switch core, routes traffic among higher-layer processors.Type: ApplicationFiled: June 30, 2001Publication date: January 2, 2003Inventors: Thomas A. Hoch, John Patrick Jones, Raymond J. Schmidt
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Publication number: 20020141344Abstract: The present invention is a methodology for controlled switchover of unicast and multicast data flows in packet based switching system. In some cases it is advantageous to purposefully support switchover of flows from one path to the other without causing loss of data. This is termed a “controlled” or “hitless” switchover. For example, it may be required to upgrade or replace a card and it is desirous to do this without taking an “Errored Second” hit at the system level. In accordance with the present invention switchover methodology, given that an ingress arbiter device is transmitting to both cores simultaneously, it is required that the flows to both switching cores be synchronized at an aggregator level and that an egress arbiter be given time to cease receiving packets from one Core then switch over to the other Core, and continue receiving packets.Type: ApplicationFiled: March 29, 2001Publication date: October 3, 2002Inventors: P. K. Chidambaran, Thomas A. Hoch, John Patrick Jones, Andrew A. Long, Prasasth R. Palnati, Raymond J. Schmidt
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Publication number: 20020080723Abstract: The present invention is a methodology for providing fault detection and service restoration for a multiservice switch on a per flow basis. An ingress source transmits the same data over each of the redundant cores. An egress receiver selects on a per flow basis which core to utilize. Bi-directional flows are not necessarily grouped together. That is, for a duplex path, one direction of transmission can proceed through a first core and the other direction can proceed through the other core if required. The basic approach to fault detection is to assume that the two cores are not in lock step, but that the shelves are continually monitoring link flows for control path data as well as user data. The path monitoring is done largely in dedicated hardware and the status is passed up to a local processor within a service shelf in order that recovery can proceed quickly.Type: ApplicationFiled: December 26, 2000Publication date: June 27, 2002Inventors: Thomas A. Hoch, John Patrick Jones, Andrew A. Long, Prasasth R. Palnati, Ronald M. Parker, Raymond J. Schmidt
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Patent number: 6078595Abstract: A data communications switch and method of operation are presently disclosed enabling flexible, selectable provision of a common timing signal for synchronized external communication through physical layer interfaces with other network devices, synchronized internal communications within the switch, and for uninterrupted synchronization of such communications. Synchronization of external communications is enabled by programmable selection from among plural potential timing references at redundant timing modules (TMs). An active TM provides a primary external synchronization clock; a standby TM provides a redundant timing function. Both TMs access the same references. A state signal indicates which synchronization clock is active. External interfaces derive timing from this distributed clock. Synchronized internal timing is provided by an internal clock and phase-locked loop (PLL) on each TM. The clock/PLL timing signal output is routed to other switch elements, enabling synchronized internal data transfer.Type: GrantFiled: August 28, 1997Date of Patent: June 20, 2000Assignee: Ascend Communications, Inc.Inventors: John Patrick Jones, Raymond Schmidt, Eric L. Reed, Patrick L. DeAngelis, Mahesh N. Ganmukhi, Thomas A. Hoch, Brian Branscomb