Patents by Inventor John Paul Drake

John Paul Drake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923327
    Abstract: A silicon integrated circuit. In some embodiments, the silicon integrated circuit includes a first conductive trace, on a top surface of the silicon integrated circuit, a dielectric layer, on the first conductive trace, and a second conductive trace, on the dielectric layer, connected to the first conductive trace through a first via.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: March 5, 2024
    Assignee: Rockley Photonics Limited
    Inventors: Michael Lee, John Paul Drake, Ying Luo, Vivek Raghunathan, Brett Sawyer
  • Publication number: 20240053551
    Abstract: A wafer with a buried V-groove cavity, and a method for fabricating V-grooves. In some embodiments, the method includes bonding a first layer, to a top surface of a substrate, to form a composite wafer, the first layer being composed of a first semiconductor material, the substrate being composed of a second semiconductor material, the top surface of the substrate having a cavity, the cavity including a V-groove.
    Type: Application
    Filed: December 10, 2021
    Publication date: February 15, 2024
    Inventors: Janne Ikonen, John Paul Drake, Henri Nykänen, Damiana Lerose
  • Patent number: 11513292
    Abstract: A mirror and method of fabricating the mirror, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; creating a via in the silicon device layer, the via extending to the BOX layer; etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer; applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel; the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer; the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: November 29, 2022
    Inventors: Henri Nykänen, John Paul Drake, Evie Kho, Damiana Lerose, Sanna Leena Mäkelä, Amit Singh Nagra
  • Publication number: 20220310540
    Abstract: A silicon integrated circuit. In some embodiments, the silicon integrated circuit includes a first conductive trace, on a top surface of the silicon integrated circuit, a dielectric layer, on the first conductive trace, and a second conductive trace, on the dielectric layer, connected to the first conductive trace through a first via.
    Type: Application
    Filed: June 5, 2020
    Publication date: September 29, 2022
    Inventors: Michael LEE, John Paul DRAKE, Ying LUO, Vivek RAGHUNATHAN, Brett SAWYER
  • Publication number: 20200264372
    Abstract: A mirror and method of fabricating the mirror, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; creating a via in the silicon device layer, the via extending to the BOX layer; etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer; applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel; the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer; the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and a
    Type: Application
    Filed: May 4, 2020
    Publication date: August 20, 2020
    Inventors: Henri Nykänen, John Paul Drake, Evie Kho, Damiana Lerose, Sanna Leena Mäkelä, Amit Singh Nagra
  • Patent number: 10641962
    Abstract: A mirror and method of fabricating the mirror, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; creating a via in the silicon device layer, the via extending to the BOX layer; etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer; applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel; the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer; the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and a
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: May 5, 2020
    Assignee: Rockley Photonics Limited
    Inventors: Henri Nykänen, John Paul Drake, Evie Kho, Damiana Lerose, Sanna Leena Mäkelä, Amit Singh Nagra
  • Publication number: 20190302366
    Abstract: A mirror and method of fabricating the mirror, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; creating a via in the silicon device layer, the via extending to the BOX layer; etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer; applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel; the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer; the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and a
    Type: Application
    Filed: March 28, 2019
    Publication date: October 3, 2019
    Inventors: Henri Nykänen, John Paul Drake, Evie Kho, Damiana Lerose, Sanna Leena Mäkelä, Amit Singh Nagra
  • Patent number: 9995604
    Abstract: An optical sensor (10) comprises an optical cavity defined by a dielectric body and responsive to one or more physical environmental conditions, and a waveguide (70) having a terminal end spaced apart from the optical cavity such that light is optically coupled from the terminal end of the waveguide (70) to the optical cavity. The waveguide (70) is arranged such that, in use, it is maintained at a first temperature that would not damage the optical coupling to the optical cavity when the dielectric body is maintained at a second temperature sufficient to damage the optical coupling to the optical cavity.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: June 12, 2018
    Assignee: OXSENSIS LIMITED
    Inventors: Arnold Peter Roscoe Harpin, John Paul Drake, Stephen Geoffrey Tyler
  • Publication number: 20170131122
    Abstract: An optical sensor (10) comprises an optical cavity defined by a dielectric body and responsive to one or more physical environmental conditions, and a waveguide (70) having a terminal end spaced apart from the optical cavity such that light is optically coupled from the terminal end of the waveguide (70) to the optical cavity. The waveguide (70) is arranged such that, in use, it is maintained at a first temperature that would not damage the optical coupling to the optical cavity when the dielectric body is maintained at a second temperature sufficient to damage the optical coupling to the optical cavity.
    Type: Application
    Filed: July 5, 2016
    Publication date: May 11, 2017
    Applicant: OXSENSIS LIMITED
    Inventors: Arnold Peter Roscoe HARPIN, John Paul DRAKE, Stephen Geoffrey TYLER
  • Patent number: 9404771
    Abstract: An optical sensor (10) comprises an optical cavity defined by a dielectric body and responsive to one or more physical environmental conditions, and a waveguide (70) having a terminal end spaced apart from the optical cavity such that light is optically coupled from the terminal end of the waveguide (70) to the optical cavity. The waveguide (70) is arranged such that, in use, it is maintained at a first temperature that would not damage the optical coupling to the optical cavity when the dielectric body is maintained at a second temperature sufficient to damage the optical coupling to the optical cavity.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: August 2, 2016
    Assignee: Oxsensis Ltd.
    Inventors: Arnold Peter Roscoe Harpin, John Paul Drake, Stephen Geoffrey Tyler
  • Publication number: 20140246610
    Abstract: An optical sensor (10) comprises an optical cavity defined by a dielectric body and responsive to one or more physical environmental conditions, and a waveguide (70) having a terminal end spaced apart from the optical cavity such that light is optically coupled from the terminal end of the waveguide (70) to the optical cavity. The waveguide (70) is arranged such that, in use, it is maintained at a first temperature that would not damage the optical coupling to the optical cavity when the dielectric body is maintained at a second temperature sufficient to damage the optical coupling to the optical cavity.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 4, 2014
    Inventors: Arnold Peter Roscoe HARPIN, John Paul DRAKE, Stephen Geoffrey TYLER
  • Patent number: 8705045
    Abstract: An optical sensor (10) comprises an optical cavity defined by a dielectric body and responsive to one or more physical environmental conditions, and a waveguide (70) having a terminal end spaced apart from the optical cavity such that light is optically coupled from the terminal end of the waveguide (70) to the optical cavity. The waveguide (70) is arranged such that, in use, it is maintained at a first temperature that would not damage the optical coupling to the optical cavity when the dielectric body is maintained at a second temperature sufficient to damage the optical coupling to the optical cavity.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: April 22, 2014
    Assignee: Oxsensis Ltd.
    Inventors: Arnold Peter Roscoe Harpin, John Paul Drake, Stephen Geoffrey Tyler
  • Publication number: 20100321703
    Abstract: An optical sensor (10) comprises an optical cavity defined by a dielectric body and responsive to one or more physical environmental conditions, and a waveguide (70) having a terminal end spaced apart from the optical cavity such that light is optically coupled from the terminal end of the waveguide (70) to the optical cavity. The waveguide (70) is arranged such that, in use, it is maintained at a first temperature that would not damage the optical coupling to the optical cavity when the dielectric body is maintained at a second temperature sufficient to damage the optical coupling to the optical cavity.
    Type: Application
    Filed: December 12, 2008
    Publication date: December 23, 2010
    Applicant: THE SCIENCE AND TECHNOLOGY FACILITIES COUNCIL
    Inventors: Arnold Peter Roscoe Harpin, John Paul Drake, Stephen Geoffrey Tyler
  • Publication number: 20050008314
    Abstract: A method of fabricating an integrated device on a chip comprising first and second features (A, B), the second feature, B, having greater dimension and/or being of coarser design than the first feature A. The method involves the steps of: depositing a resist onto the chip, the resist being of a type that forms a thinner deposit on larger or coarser features than on smaller or finer features; treating the resist in dependence upon the thickness thereof to render it susceptible to a subsequent etching step, the thicker areas of resist being treated for a longer period of time or by a more intense treatment than the thinner areas of resist; and etching the treated areas of the resist to form a mask for use in the fabrication of said first and second features (A, B), on the chip.
    Type: Application
    Filed: October 25, 2001
    Publication date: January 13, 2005
    Inventor: John Paul Drake
  • Publication number: 20040020893
    Abstract: A method of producing an optical grating component including only a single continuous grating field formed in a longitudinal waveguide rib, the method including the steps of defining a grating in an optic chip including a portion thereof through which the longitudinal waveguide rib is to extend, and then defining the lateral edges of the longitudinal rib in the optic chip, whereby any portion of the grating extending laterally beyond the lateral width of the rib is removed in the step of defining the lateral edges of the rib leaving a single continuous grating field that has straight lateral grating boundaries that are laterally aligned with the straight lateral edges of the rib.
    Type: Application
    Filed: January 14, 2003
    Publication date: February 5, 2004
    Applicant: BOOKHAM TECHNOLOGY, PLC.
    Inventors: John Paul Drake, Andrew Tomlinson, Abdel Karim Zekak
  • Publication number: 20030215187
    Abstract: An arrangement of an integrated optical waveguide (1) relative to a V-groove (2) for receiving an optical fibre (5) which is to be optically coupled with an end of the waveguide (1) is described. A waveguide (1) is formed in a crystalline optical substrate (3), and a V-groove (2) formed therein beneath an elongate parallel sided window in the substrate with a centre line (2A) of the V-groove (2) aligned with an end (1A) of the waveguide (1). The parallel sides (2B, 2C) of the window at the end of the V-groove (2) aligned with the waveguide (1) terminate out of alignment with each other in a direction along the length of the V-groove whereby the V-groove undercuts a portion (3A) of the optically conducting layer (3) beneath said end of the waveguide (1). The end of the waveguide (1) therefore overhangs the end of the V-groove (2) to enable the end of an optical fibre (5) to be located in close proximity thereto.
    Type: Application
    Filed: February 20, 2003
    Publication date: November 20, 2003
    Applicant: Bookham Technology plc
    Inventors: Jolyon Richard Tidmarsh, Matthew Peter Shaw, John Paul Drake
  • Patent number: 6556759
    Abstract: A rib waveguide structure comprising a layer (4) of light conductive material defined between two planar faces with a rib (9) formed on one of the faces and an optical component e.g. a tapered waveguide (6) optically coupled to the other face. An inverted rib waveguide comprising a light conductive layer (11) and a rib (10) that projects from the light conductive layer (11) into a substrate (4,8) is also described as well as other optical devices comprising a light conductive layer separated from a substrate by a non-planar layer (3) of light confining material and optical devices comprising two or more layers (2, 3; 18, 19, 20) of light confining material buried within a rib with a light conducting component (10; 17; 22) at least a part of which is formed between planes defined by the two layers of light confining material. A method of forming such devices is also described.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: April 29, 2003
    Assignee: Bookham Technology plc
    Inventors: Stephen William Roberts, Bradley Jonathan Luff, John Paul Drake, Stephen Geoffrey Unwin
  • Patent number: 6509139
    Abstract: A method of fabricating an integrated optical component on a silicon-on insulator chip comprising a silicon layer (1) separated from a substrate (2) by an insulating layer (3), the component having a first set of features, eg a rib waveguide (5) at a first level in the silicon layer (1) adjacent the insulating layer (3) and a second set of features, eg a triangular section (5B) at a second level in the silicon layer (1) further from the insulating layer (3), the method comprising the steps of: selecting a silicon-on-insulator chip having a silicon layer (1) of sufficient thickness for the first set of features; fabricating the first set of features in the silicon layer (1) at a first level in the silicon layer; increasing the thickness of the silicon layer (1) in selected areas to form a second level of the silicon layer (1) over part of the first level; and then fabricating the second set of features at the second level in the silicon layer (1).
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: January 21, 2003
    Assignee: Bookham Technology PLC
    Inventors: Stephen William Roberts, John Paul Drake, Arnold Peter Roscoe Harpin
  • Patent number: 6510258
    Abstract: A method of forming an integrated chip optical device as a protective layer formed over part of the face of the chip on which at least one optical waveguide is formed, and the protective coating is selectively removed leaving the coating over an edge region 18 and the edge of the device is polished to provide high edge quality against which offchip optical fibers may be abutted.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: January 21, 2003
    Assignee: Bookham Technology PLC
    Inventors: Stephen William Roberts, John Paul Drake
  • Publication number: 20020131747
    Abstract: A rib waveguide structure comprising a layer (4) of light conductive material defined between two planar faces with a rib (9) formed on one of the faces and an optical components e.g. a tapered waveguide (6) optically coupled to the other face. An inverted rib waveguide comprising a light conductive layer (11) and a rib (10) that projects from the light conductive layer (11) into a substrate (4, 8) is also described as well as other optical devices comprising a light conductive layer separated from a substrate by a non-planar layer (3) of light confining material and optical devices comprising two or more layers (2, 3; 18, 19, 20) of light confining material buried within a rib with a light conducting component (10; 17; 22) at least a part of which is formed between planes defined by the two layers of light confining material. A method of forming such devices is also described.
    Type: Application
    Filed: May 25, 2001
    Publication date: September 19, 2002
    Applicant: Bookham Technology plc
    Inventors: Stephen William Roberts, Bradley Jonathan Luff, John Paul Drake, Stephen Geoffrey Unwin