Patents by Inventor John Pennock

John Pennock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10173892
    Abstract: This application relates to an integrated circuit die (200) comprising a MEMS transducer structure (101) integrated with associated electronic circuitry (102). The electronic circuitry comprises a plurality of transistors and associated interconnections and is formed in a first area (103) of the die from a first plurality (104) of layers, e.g. formed by CMOS metal (107) and dielectric (108) layers and possibly doped areas (106) of substrate (105). The MEMS transducer structure is formed in a second area (111) of the die and is formed, at least partly, from a second plurality (112) of layers which are separate to the first plurality of layers. At least one filter circuit (201) is formed from said second plurality of layers overlying the plurality of transistors of the electronic circuitry (102).
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: January 8, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: James Deas, Jean Lasseuguette, John Pennock, Mark Hesketh
  • Publication number: 20170217757
    Abstract: This application relates to an integrated circuit die (200) comprising a MEMS transducer structure (101) integrated with associated electronic circuitry (102). The electronic circuitry comprises a plurality of transistors and associated interconnections and is formed in a first area (103) of the die from a first plurality (104) of layers, e.g. formed by CMOS metal (107) and dielectric (108) layers and possibly doped areas (106) of substrate (105). The MEMS transducer structure is formed in a second area (111) of the die and is formed, at least partly, from a second plurality (112) of layers which are separate to the first plurality of layers. At least one filter circuit (201) is formed from said second plurality of layers overlying the plurality of transistors of the electronic circuitry (102).
    Type: Application
    Filed: July 30, 2015
    Publication date: August 3, 2017
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: James DEAS, Jean LASSEUGUETTE, John PENNOCK, Mark HESKETH
  • Patent number: 7573152
    Abstract: The present invention provides a self-contained power management device, such as a power management IC or an IC including power management functions, which allow sequenced start up of power supplies without the need for an external sequencer and with a simple user configurable arrangement.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: August 11, 2009
    Assignee: Wolfson Microelectronics plc
    Inventors: Mark Jacob, John Pennock, David Dearn
  • Publication number: 20080116979
    Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.
    Type: Application
    Filed: December 13, 2007
    Publication date: May 22, 2008
    Inventors: John Lesso, John Pennock, Peter Frith
  • Publication number: 20080024108
    Abstract: The present invention provides a self-contained power management device, such as a power management IC or an IC including power management functions, which allow sequenced start up of power supplies without the need for an external sequencer and with a simple user configurable arrangement.
    Type: Application
    Filed: April 9, 2007
    Publication date: January 31, 2008
    Inventors: Mark Jacob, John Pennock, David Dearn
  • Publication number: 20060109055
    Abstract: An analog circuit for processing analog signals in an integrated circuit comprising a number of metal oxide semiconductor transistor devices. The circuit includes a first transistor device having a thin oxide thickness, and a second transistor device having a thicker oxide thickness. A voltage pulse protection is arranged to maintain the operating voltage of the thin oxide transistor in the presence of a rapidly rising voltage waveform (e.g. ESD), or at least to mitigate its effect on the thin oxide transistor device. Preferably a cascode based op amp structure is implemented.
    Type: Application
    Filed: November 7, 2005
    Publication date: May 25, 2006
    Inventor: John Pennock
  • Publication number: 20050206454
    Abstract: The present invention relates amplifiers using metal oxide semiconductor based integrated circuits. The present invention is particularly but not exclusively related to audio application mixed signal chips. The present invention provides an analogue circuit for processing analogue signals in an integrated circuit comprising a number of metal oxide semiconductor transistor devices, the circuit stage comprising a first said transistor device having a first oxide thickness, and a second said transistor device having a second and different oxide thickness. Preferably a cascode based op amp structure is implemented.
    Type: Application
    Filed: May 4, 2004
    Publication date: September 22, 2005
    Inventors: Patrick Richard, John Pennock
  • Publication number: 20050181878
    Abstract: A method and system facilitating selection of participants in multiplayer online electronic games. The method provides an efficient procedure for players to host and join new instances of multiplayer online electronic games, as well as providing a scheme that enables players to join multiplayer online electronic games that are already in progress. The method is implemented through a gaming utility that runs on each player's electronic device (e.g. PC) and interacts behind the scenes with an online messaging service. Player hosts are enabled to select players from a list of contacts provided by the online messaging service who they want to invite to join a chat session. A selected multiplayer online electronic game is selectively launched on all of the player's computers through a single command issued by the host.
    Type: Application
    Filed: March 24, 2005
    Publication date: August 18, 2005
    Applicant: Microsoft Corporation
    Inventors: Damon Danieli, John Selbie, Matthew Stipes, John Pennock, Drew Bamford
  • Publication number: 20050122245
    Abstract: This invention is generally concerned with digital-to-analogue converters and more particularly relates to techniques for reducing signal dependent loading of reference voltage sources used by these converters. A differential switched capacitor digital-to-analogue (DAC) circuit (500) comprises first and second differential signal circuit portions (500a,b) for providing respective positive and negative signal outputs with respect to a reference level, and has first and second reference voltage inputs (112,114) for receiving respective positive and negative references. Each of said first and second circuit portions comprises an amplifier (102a,b) with a feedback capacitor (104a,b), a second capacitor (106a,b), and a switch (108a,b, 110a,b) to switchably couple said second capacitor to a selected one of said reference voltage inputs to charge the second capacitor and to said feedback capacitor to share charge with the feedback capacitor.
    Type: Application
    Filed: February 4, 2004
    Publication date: June 9, 2005
    Inventors: Peter Frith, John Pennock
  • Publication number: 20050110574
    Abstract: An amplifier is disclosed, having an input stage connected to an output stage. The input stage is connected between a positive supply rail and a ground rail and has an input terminal arranged to receive an input signal. The output stage is connected between a positive supply rail and a negative supply rail and has an output terminal. The output stage is adapted to generate an output signal, which is dependent on a received input signal, at the output, and is further adapted such that, in use, a quiescent voltage at the output terminal is at a selected value between a voltage on the positive supply rail and a voltage on the negative supply rail. For driving a grounded load, the quiescent output voltage is preferably zero volts. In preferred embodiments, the input and output stages are formed on a common substrate using CMOS technology, the output stage including one or more NMOS devices having a triple-well structure. A corresponding method of driving a grounded load is also disclosed.
    Type: Application
    Filed: May 10, 2004
    Publication date: May 26, 2005
    Inventors: Patrick Richard, John Pennock