Abstract: An active matrix array device has driver circuitry for providing address signals to the matrix elements, including digital to analogue converter circuitry. This has a voltage selector for selecting a pair of voltages based on a first set of bits of the digital matrix element signal, and a converter arrangement for providing an analogue voltage level derived from the pair of voltages and from a second set of bits of the digital matrix element signal. The converter arrangement comprises first and second digital to analogue converter circuits (30, 32) in parallel and which are adapted to provide an analogue voltage level to an output of the converter arrangement alternately. The invention provides a more efficient use of substrate area for given circuit response requirements.

Abstract: An active matrix display has a column driver for providing signals to the pixels for driving the display elements, the column driver comprising digital to analogue converter circuitry providing a first number of display element drive levels. Within each pixel, the first number of display element drive levels is converted into a second, greater number, of pixel grey levels. This combines multi-level digital to analogue conversion with in-pixel level generation and enables the complexity of the DACs to be reduced so that they can be integrated onto the display substrate, for example using low temperature polysilicon processing.

Abstract: An amplification circuit comprises a capacitor arrangement (42) and a switching arrangement. The capacitor arrangement has a first capacitor (C2) which has a voltage-dependent capacitance and a second capacitor (C1) (which may also be voltage-dependent). The circuit is operable in two modes, a first mode in which the input voltage is provided to one terminal of at least the first capacitor, and a second mode in which the switching arrangement causes charge to be redistributed between the first and second capacitors such that the voltage across the first capacitor changes to reduce the capacitance of the first capacitor, the output voltage being dependent on the resulting voltage across the first capacitor. The invention uses a voltage controlled capacitance in combination with charge sharing between capacitors, which has the result of providing a voltage amplification characteristic. This arrangement can thus be used for the amplification of an analogue voltage, or the boosting of a fixed level (i.e.

Abstract: An active matrix array device has a plurality of matrix array elements (100), each of which have a first capacitive device (120) coupled to a charging conductor (32m) via a first switch (100) being responsive to an addressing conductor (22n). In addition, the matrix array elements (100) comprise a second capacitive device (130) coupled to the first capacitive device (120) via a second switch (112) being responsive to en enable signal provided via an enable conductor (42n). The second capacitive device (130) is coupled to the control terminal of a third switch (114), which is coupled between the first capacitive device (120) and a potential source like the charging conductor (32m). The second capacitive device (130) is used to sample the voltage across the first capacitive device (120), which enables the third switch (114) if of an appropriate value, thus providing a conductive path between the first capacitive device (120) and the potential source.

Abstract: An inkjet print head comprises an array of print head heater circuits. Each circuit has a heater element (12) and a drive transistor (14) in series between power lines (20,22), and with a node (23) at the junction therebetween. A first capacitive element (50) is coupled between a first control signal (52) and the node (23) and a second capacitive element (54) is coupled between a second control signal (56), which is complementary to the first control signal (52), and the node (23). The two capacitive elements can be used to capacitively couple opposite step voltage changes into the circuit. These capacitive coupling effects can be used to alter the switching characteristics so as to reduce simultaneous high voltages on the gate and drain of the drive transistor.

Abstract: An active matrix array device has driver circuitry for providing address signals to the matrix elements, including digital to analogue converter circuitry. This has a voltage selector for selecting a pair of voltages based on a first set of bits of the digital matrix element signal, and a converter arrangement for providing an analogue voltage level derived from the pair of voltages and from a second set of bits of the digital matrix element signal. The converter arrangement comprises first and second digital to analogue converter circuits (30, 32) in parallel and which are adapted to provide an analogue voltage level to an output of the converter arrangement alternately. The invention provides a more efficient use of substrate area for given circuit response requirements.

Abstract: A charge pump circuit has a voltage increasing stage and a voltage decreasing stage in parallel, and sharing a common input. This shows charge to flow between the stages, so that charge used in the pumping of one stage is recycled to the other stage.

Abstract: An electronic device has a first active matrix pixel array device (52) and a second pixel array device (54). The first and second pixel arrays are provided on separate substrates (56,58), and a part (62) of the addressing or processing circuitry of the first active matrix array device (52) is provided on the substrate (58) of the second pixel array. The invention provides the distribution of control circuitry between two substrates (56,58) in a device having two array devices (52,54). This can enable the costs associated with a defect in the row and column driver circuitry to be minimised.

Abstract: A display device with capacitive display pixels, in which a drive scheme is used for capacitive coupling of voltages to enable reduced column voltage swings to be obtained. Each pixel has two storage capacitors. The use of two storage capacitors provides some freedom in the choice of the magnitude of the voltage swing provide on one terminal of one of the storage capacitors. The first capacitor (C1) of all pixels of the display may be grounded, and only the second capacitor (C2) is subjected to changes in voltage to be capacitively coupled to the display cell. This provides a flexible capacitor line drive type scheme.

Abstract: An active matrix device includes a plurality of display elements 10 including a data storage node 18, 72 for storing data in the form of charge on a capacitor 72 and/or capacitative element 18. Refresh circuitry 51 is provided to refresh the data storage node, for example including temporary storage circuit 55 and drive circuit 56.

Abstract: A pixellated device (10), such as a display, has pixel row and column address lines (18,20) for addressing each pixel, thereby providing signal data to each pixel (12) or reading signal data from each pixel. An array of memory cells (22) is provided on the substrate interspersed with the pixel drive circuitry (16), wherein memory address circuitry (24,26,28,30) is provided enabling data to be written to each memory cell and enabling data to be read from each cell (22), independently of the signal data. Each memory cell (22) is thus addressable independently of the pixel data. Thus, the memory cells do not form part of the pixel circuitry, which allows the memory to be used in a flexible manner. For example, the memory may be used for purposes not directly associated with the driving or addressing of the pixels of the device.

Abstract: An active matrix display device includes a plurality of pixels (10) arranged as rows and columns and column electrodes (16) extending along corresponding columns of pixels (10). The pixels include a capacitance (18,70) for storing image data and a read circuit for reading the charge stored on the capacitance (18,70) and driving the column electrode with the read charge.

Abstract: An active matrix substrate includes a row and column array of active elements. Each element is associated with a TFT having a gate electrode connected to a corresponding row conductor and source and drain (electrodes connected to corresponding column conductors. Circuitry for protecting against electrostatic discharge (ESD) is connected to at least one of the row conductors for protecting the TFTs against ESD.

Abstract: A method of manufacturing an active matrix substrate (1) comprising a row and column array of active elements (10) wherein each element (11) is associated with a TFT (13) having a gate electrode (306) connected to a corresponding row conductor (15) and source (320) and drain (321) electrodes connected to corresponding column conductors (14), and ESD protective circuitry (20) connected to at least one of the row conductors for protecting the TFTs against electrostatic discharge (ESD). The method comprising the steps of forming semiconductor regions of the TFTs (302) and the ESD protective circuitry (303); depositing gate electrodes (306) of the TFTs and corresponding row conductors (15); and depositing source (320) and drain (321) electrodes of the TFTs and corresponding column conductors (14), wherein the ESD protective circuitry (20) is operative to control ESD prior to deposition of the column conductors (14).

Abstract: A method of fabricating an electronic device comprising a thin-film transistor, which addresses a problem of increased off-state current and reduced carrier mobility in self-aligned thin-film transistors. According to the method, a gate layer (2,46) is etched back underneath a mask layer (20,48). Following an implantation step using the mask layer as an implantation mask, the etch-back exposes implant damage which is then annealed by an energy beam (42).

Abstract: An active matrix substrate includes a row and column array of active elements. Each element is associated with a TFT having a gate electrode connected to a corresponding row conductor and source and drain (electrodes connected to corresponding column conductors. Circuitry for protecting against electrostatic descharge (ESD) in connected to at least one of the row conductors for protecting the TFTs against ESD. A method for manufacturing the active matrix substrate includes forming semiconductor regions of the TFTs and the ESD protective circuitry, depositing gate electrodes of the TFTs and corresponding row conductors, and depositing source and drain electrodes of the TFTs and corresponding column conductors. The ESD protective circuitry operates to control ESD prior to deposition of the column conductors.

Abstract: A display device with capacitive display pixels, in which a drive scheme is used for capacitive coupling of voltages to enable reduced column voltage swings to be obtained. Each pixel has two storage capacitors. The use of two storage capacitors provides some freedom in the choice of the magnitude of the voltage swing provide on one terminal of one of the storage capacitors. The first capacitor (C1) of all pixels of the display may be grounded, and only the second capacitor (C2) is subjected to changes in voltage to be capacitively coupled to the display cell. This provides a flexible capacitor line drive type scheme.

Abstract: A pixellated device (10), such as a display, has pixel row and column address lines (18,20) for addressing each pixel, thereby providing signal data to each pixel (12) or reading signal data from each pixel. An array of memory cells (22) is provided on the substrate interspersed with the pixel drive circuitry (16), wherein memory address circuitry (24,26,28,30) is provided enabling data to be written to each memory cell and enabling data to be read from each cell (22), independently of the signal data. Each memory cell (22) is thus addressable independently of the pixel data. Thus, the memory cells do not form part of the pixel circuitry, which allows the memory to be used in a flexible manner. For example, the memory may be used for purposes not directly associated with the driving or addressing of the pixels of the device.

Abstract: An active matrix display device includes a plurality of pixels (10) arranged as rows and columns and column electrodes (16) extending along corresponding columns of pixels (10). The pixels include a capacitance (18,70) for storing image data and a read circuit for reading the charge stored on the capacitance (18,70) and driving the column electrode with the read charge.

Abstract: An active matrix device includes a plurality of display elements 10 including a data storage node 18, 72 for storing data in the form of charge on a capacitor 72 and/or capacitative element 18. Refresh circuitry 51 is provided to refresh the data storage node, for example including temporary storage circuit 55 and drive circuit 56.