Patents by Inventor John R. Jameson

John R. Jameson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230086109
    Abstract: A method of forming bottom electrodes in a resistive memory device, can include: depositing a bottom insulator on a substrate ILD; forming vias in the substrate by patterning and etching holes in the bottom insulator and the substrate ILD; filling the holes with a via metal to form a flat via surface; depositing a bottom electrode thin film and a top insulator; defining the bottom electrode; etching the top insulator, the bottom electrode thin film, and the bottom insulator; depositing a cell plate layer having a switching layer, an anode layer, and a cap layer; patterning the cell plate layer by depositing and patterning a cell plate hard mask layer, and then etching the cell plate layer; encapsulating the cell plate layer; and forming electrical contact to the cell plate layer.
    Type: Application
    Filed: August 3, 2022
    Publication date: March 23, 2023
    Inventors: John R. Jameson, Kuei-Chang Tsai
  • Patent number: 11537754
    Abstract: An integrated circuit device can include a plurality of nonvolatile memory elements having values that vary randomly or pseudo-randomly from one another; a selection circuit configured to select a plurality of nonvolatile memory elements that vary randomly or pseudo-randomly in response to a received challenge value; and sense circuits configured to generate a response value based on the values of the selected nonvolatile memory elements. Related methods and systems are also disclosed.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: December 27, 2022
    Assignee: Adesto Technologies Corporation
    Inventors: John R. Jameson, David Kim, Foroozan Sarah Koushan
  • Publication number: 20220156345
    Abstract: A memory device includes a memory array arranged in rows and columns; memory cell layers at each row and column intersection, where each memory cell layer is configured to be set to a predetermined conductance state; a row control circuit that is configured to apply voltages to the rows by applying sub-voltages on each row, where each sub-voltage corresponds to a different memory cell layer, and where each sub-voltage is proportional to the voltage on the corresponding row; and a sensing circuit that is configured to determine a column current flowing through a selected column in response to the application of the voltages to the rows, where the column current is a sum of currents through each memory cell layer that corresponds to the selected column.
    Type: Application
    Filed: May 28, 2020
    Publication date: May 19, 2022
    Inventor: John R. Jameson
  • Patent number: 9818939
    Abstract: In one embodiment of the present invention, a resistive switching device includes a first electrode disposed over a substrate and coupled to a first potential node, a switching layer disposed over the first electrode, a conductive amorphous layer disposed over the switching layer, and a second electrode disposed on the conductive amorphous layer and coupled to a second potential node.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: November 14, 2017
    Assignee: ADESTO TECHNOLOGIES CORPORATION
    Inventors: John R. Jameson, III, John E. Sanchez, Wei Ti Lee, Yi Ma, Venkatesh P. Gopinath, Foroozan Sarah Koushan
  • Patent number: 9368206
    Abstract: In one embodiment, a capacitive circuit can include: (i) a resistive storage element having a solid electrolyte, a first electrode coupled to a first side of the solid electrolyte, and a second electrode coupled to a second side of the solid electrolyte; (ii) the resistive storage element being configured to be programmed to a low resistance state by application of a program voltage in a forward bias direction to form a conductive path between the first and second electrodes, and being configured to be erased to a high resistance state by application of an erase voltage in a reverse bias direction to substantially dissolve the conductive path; and (iii) a first capacitor having the first electrode coupled to a first side of a first oxide layer, and a third electrode coupled to a second side of the first oxide layer.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: June 14, 2016
    Assignee: Adesto Technologies Corporation
    Inventors: John Dinh, Ming Sang Kwan, Venkatesh P. Gopinath, Derric Lewis, Shane Hollmer, John R. Jameson, Michael Van Buskirk
  • Publication number: 20160118585
    Abstract: In one embodiment of the present invention, a resistive switching device includes a first electrode disposed over a substrate and coupled to a first potential node, a switching layer disposed over the first electrode, a conductive amorphous layer disposed over the switching layer, and a second electrode disposed on the conductive amorphous layer and coupled to a second potential node.
    Type: Application
    Filed: January 7, 2016
    Publication date: April 28, 2016
    Inventors: John R. Jameson, III, John E. Sanchez, Wei Ti Lee, Yi Ma, Venkatesh P. Gopinath, Foroozan Sarah Koushan
  • Patent number: 9252359
    Abstract: In one embodiment of the present invention, a resistive switching device includes a first electrode disposed over a substrate and coupled to a first potential node, a switching layer disposed over the first electrode, a conductive amorphous layer disposed over the switching layer, and a second electrode disposed on the conductive amorphous layer and coupled to a second potential node.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: February 2, 2016
    Assignee: Adesto Technologies Corporation
    Inventors: John R. Jameson, III, John E. Sanchez, Wei Ti Lee, Foroozan Sarah Koushan
  • Patent number: 4983438
    Abstract: A multi-ply form with labels and multiple form parts is provided, including first and second webs secured one to the other with repositionable adhesive. A plurality of different types of labels are permanently secured to the second web. At least one label of the second web registers with a die-cut portion in the second web and both the one label and die-cut portion register with a die-cut section of the first web. When the webs are separated, the die-cut section is adhered to the second web, enabling removal of the one label therefrom in a manner to provide securment to a surface using either repositionable adhesive or permanent adhesive. Additional holding power may be provided when using the repositionable adhesive by providing a further die-cut segment within the die-cut section of the first web whereby the area of application of the adhesive may be large or small, depending upon whether the die-cut section is removed or not. The first web also includes a second section forming a first form part.
    Type: Grant
    Filed: December 18, 1989
    Date of Patent: January 8, 1991
    Assignee: Moore Business Forms, Inc.
    Inventor: John R. Jameson
  • Patent number: 4910058
    Abstract: A multi-ply form with labels is provided, including first and second webs secured one to the other with repositionable adhesive. A plurality of different types of labels are permanently secured to the second web. At least one label of the second web registers with a die-cut portion in the second web and both the one label and die-cut portion register with a die-cut section of the first web. When the webs are separated, the die-cut section is adhered to the second web, enabling removal of the one label therefrom in a manner to provide securement to a surface using either repositionable adhesive or permanent adhesive. Additional holding power may be provided when using the repositionable adhesive by providing a further die-cut segment within the die-cut section of the first web whereby the area of application of the adhesive may be large or small, depending upon whether the die-cut section is removed or not.
    Type: Grant
    Filed: February 27, 1989
    Date of Patent: March 20, 1990
    Assignee: Moore Business Forms, Inc.
    Inventor: John R. Jameson