Patents by Inventor John R. Larkin

John R. Larkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020123936
    Abstract: A community partnership portal enables a specific town's residents to shop stores in an on-line version of their town. Other links provide access to community related information. Using a map such as a graphical representation of the specific town, residents can “enter” a store by selecting the store's location on the map. The system enables town residents to benefit from local store familiarity with Internet convenience while supporting the economic health of a local community.
    Type: Application
    Filed: March 2, 2001
    Publication date: September 5, 2002
    Inventors: Celeste K. Hansen, Thomas A. Douglas, John J. Ellwood, Feng Guan, Barri Klingaman, John R. Larkin, Charles M. Schwartz, Eric W. Smith, Sonney Taragin
  • Patent number: 5923836
    Abstract: A method to test an integrated circuit design on a computer simulation loads a desired simulation test vector in parallel into a scan chain (30). The simulation loads the desired vector at a slight offset or upstream shift allowing several serial shifts of the loaded vector through the scan chain (32). After the serial shifts, the initial IC state is set for executing an IC function (34). The IC function includes applying an input on the external pins and receiving an output from the external pins, given the initial IC state loaded by the simulation After executing the IC function, the simulation unloads the resulting IC state in parallel (36) and compares the resulting IC state to a target vector (38).
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: July 13, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Phillip T. Barch, Christopher J. Ellingham, Frederick L. Wagner, John R. Larkin
  • Patent number: 5574853
    Abstract: A method to test an integrated circuit design on a computer simulation loads a desired simulation test vector in parallel into a scan chain (30). The simulation loads the desired vector at a slight offset or upstream shift allowing several serial shifts of the loaded vector through the scan chain (32). After the serial shifts, the initial IC state is set for executing an IC function (34). The IC function includes applying an input on the external pins and receiving an output from the external pins, given the initial IC state loaded by the simulation. After executing the IC function, the simulation unloads the resulting IC state in parallel (36) and compares the resulting IC state to a target vector (38).
    Type: Grant
    Filed: January 3, 1994
    Date of Patent: November 12, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Phillip T. Barch, Christopher J. Ellingham, Frederick L. Wagner, John R. Larkin