Patents by Inventor John R. Lynch

John R. Lynch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240288897
    Abstract: Flexible electronic devices may be provided. A flexible electronic device may include a flexible display, a flexible housing and one or more flexible internal components configured to allow the flexible electronic device to be deformed. Flexible displays may include flexible display layers, flexible touch-sensitive layers, and flexible display cover layers. The flexible housing may be a multi-stable flexible housing having one or more stable positions. The flexible housing may include a configurable support structure that, when engaged, provides a rigid support structure for the flexible housing. The flexible internal components may include flexible batteries, flexible printed circuits or other flexible components. A flexible battery may include flexible and rigid portions or may include a lubricious separator layer that provides flexibility for the flexible battery.
    Type: Application
    Filed: May 3, 2024
    Publication date: August 29, 2024
    Inventors: Jeremy C. Franklin, Scott A. Myers, Benjamin M. Rappoport, Stephen Brian Lynch, John P. Ternus, Justin R. Wodrich
  • Publication number: 20240264727
    Abstract: Devices, methods and graphical user interfaces for manipulating user interfaces based on fingerprint sensor inputs are provided. An electronic device with a display and a fingerprint sensor may obtain fingerprint-verification criteria for controlling verification of fingerprints. For each of a plurality of respective inputs that correspond to respective restricted operations, the device may identify fingerprint features of the respective input. The device may determine fingerprint-verification information for the respective input. In response to detecting the respective input and in accordance with a determination that the fingerprint-verification information meets respective authorization criteria for the respective restricted operation, the device may perform the respective restricted operation.
    Type: Application
    Filed: April 17, 2024
    Publication date: August 8, 2024
    Inventors: Benjamin J. POPE, Daniel W. JARVIS, Nicholas G. MERZ, Scott A. MYERS, Michael A. CRETELLA, Michael ENG, James H. FOSTER, Terry L. GILTON, Myra HAGGERTY, Byron B. HAN, M. Evans HANKEY, Steven P. HOTELLING, Brian R. LAND, Stephen Brian LYNCH, Paul MEADE, Mushtaq A. SARWAR, John P. TERNUS, Paul M. THOMPSON, Marcel VAN OS, John A. WRIGHT
  • Patent number: 11656766
    Abstract: A temporal correlation may be determined between times specified according to different time standards on different storage network components. A host system may poll a storage system periodically. In response to each poll request, the storage system may respond with the current time on the storage system (CST) according to the time standard of the storage system. The host system may store temporal correlation information (TCI) associating the CST and the current time on the host system (CHT) according to the time standard of the host system. A data structure (TCT) may be provided, where each entry may specify TCI for a CST/CHT pair, the TCI including the CST, CHT and other information corresponding to the temporal correlation between the pair. The TCI may be used to correlate the time of a phenomenon according to the host system time standard to a time according to the storage system time standard.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: May 23, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: John R. Lynch, Arieh Don
  • Publication number: 20220317892
    Abstract: A temporal correlation may be determined between times specified according to different time standards on different storage network components. A host system may poll a storage system periodically. In response to each poll request, the storage system may respond with the current time on the storage system (CST) according to the time standard of the storage system. The host system may store temporal correlation information (TCI) associating the CST and the current time on the host system (CHT) according to the time standard of the host system. A data structure (TCT) may be provided, where each entry may specify TCI for a CST/CHT pair, the TCI including the CST, CHT and other information corresponding to the temporal correlation between the pair. The TCI may be used to correlate the time of a phenomenon according to the host system time standard to a time according to the storage system time standard.
    Type: Application
    Filed: April 5, 2021
    Publication date: October 6, 2022
    Applicant: EMC IP Holding Company LLC
    Inventors: John R. Lynch, Arieh Don
  • Patent number: 11422704
    Abstract: Techniques for processing I/O operations in a data storage system may include: receiving I/O operations directed to a logical device associated with a service level specifying a target I/O response time goal; receiving a input identifying whether to calculate an observed I/O response time for the logical device using only an internal processing time associated with processing performed within the data storage system when servicing I/O operations directed to the logical device; determining, in accordance with the input and the I/O operations directed to the logical device, the observed I/O response time for the logical device; determining a service level violation for the first logical device whereby the observed I/O response time violates the service level; and responsive to determining the service level violation whereby the observed I/O response time violates the service level, performing processing to alleviate or remove the first service level violation.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: August 23, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: John A. Adams, Arieh Don, John R. Lynch
  • Publication number: 20220129152
    Abstract: Techniques for processing I/O operations in a data storage system may include: receiving I/O operations directed to a logical device associated with a service level specifying a target I/O response time goal; receiving a input identifying whether to calculate an observed I/O response time for the logical device using only an internal processing time associated with processing performed within the data storage system when servicing I/O operations directed to the logical device; determining, in accordance with the input and the I/O operations directed to the logical device, the observed I/O response time for the logical device; determining a service level violation for the first logical device whereby the observed I/O response time violates the service level; and responsive to determining the service level violation whereby the observed I/O response time violates the service level, performing processing to alleviate or remove the first service level violation.
    Type: Application
    Filed: October 27, 2020
    Publication date: April 28, 2022
    Applicant: EMC IP Holding Company LLC
    Inventors: John A. Adams, Arieh Don, John R. Lynch
  • Patent number: 5921895
    Abstract: A martial arts striking device using a pair of spaced and heavy duty spring assemblies with a top bracket having a centered opening for receiving an upright post supporting a resilient striking bag. The lower ends of the spring assemblies are secured to a bottom bracket, which is fastened to a firm footing such as a floor. The wire making up the springs are of such a diameter that the springs have a low spring constant, meaning the springs are highly resistive to impacts against the bag and will return to an upright position without undue oscillation.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: July 13, 1999
    Inventors: John R. Lynch, Thomas G. Coleman
  • Patent number: 5904555
    Abstract: A method for packaging a semiconductor device (22) formed on a die (12) having opposing major surfaces includes pre-soldering the die (12) at wafer level using an electroplating process, wherein the die (12) has solder bumps disposed on each opposing major surface. The pre-soldered wafer (10) is then diced into pre-soldered dies. The die (12) is placed in a glass sleeve (45) and aligned with two bumpless lead assemblies (46, 48). The bumpless lead assemblies (46, 48) are solder bonded to the die (12) via a reflow process. The reflow process also partially melts the glass sleeve (45), thereby forming a hermetically sealed glass capsule (55) surrounding the semiconductor device (22).
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: May 18, 1999
    Assignee: Motorola, Inc.
    Inventors: Sury Narayana Darbha, John R. Lynch
  • Patent number: 4233645
    Abstract: A semiconductor device package having a substrate, one or more semiconductor devices mounted on the top surface of the substrate, a heat sink having a surface in opposed spaced parallel relation to the top surface of the substrate, and at least one deformable heat transfer member positioned between a device mounted on the top surface of the substrate, and the surface of the heat sink. The heat transfer member is comprised of a porous block of material, and a heat conductive non-volatile liquid retained within the block of material by a surface tension. The heat transfer member being operative to transfer heat from the device to the heat sink.
    Type: Grant
    Filed: October 2, 1978
    Date of Patent: November 11, 1980
    Assignee: International Business Machines Corporation
    Inventors: Demetrios Balderes, John R. Lynch, Robert A. Yacavonis
  • Patent number: D408925
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: April 27, 1999
    Inventors: Harvey Berry, John R. Lynch