Abstract: A method of automatically checking digital camera images for dust on the image sensors of the associated cameras is disclosed that enables operators to check the performance level of digital cameras in real time and correct or take out of service those that do not pass the checking procedure.

Abstract: A basic Schmitt trigger circuit is modified with additional circuit components for a two-input bistable circuit (latch). The latching Schmitt trigger circuit exhibits enhanced operating characteristics, such as fast and reliable switching between stable states. Also the circuit is compatible with design parameters and operating tolerances of integrated circuits. The latching Schmitt trigger circuit enables implementation of a fast reliable arbitration circuit in an integrated circuit version by minimizing the necessary time delay between the end of a resource request signal period and the start of an interrogate signal period.

Abstract: A dual port memory cell suitable for use in emitter coupled logic applications is accessible from two different address ports. The dual port storage cell includes first and second cross coupled cells, each including a selection conductor and a pair of diodes coupled to the cross coupled transistors to effect selection of that storage cell. The base of each of the cross coupled transistors of the first storage cell is coupled to the base of a coupling transistor, the emitter of which is connected to the base of a corresponding transistor of the other storage cell. Each dual port memory cell has two pairs of bit lines, one pair being coupled to the first storage cell and the other being coupled to the second storage cell. If one of the storage cells is selected, and the other remains unselected, the information in the selected cell is automatically written into the unselected storage cell.

Abstract: A sense-write circuit for use with a emitter coupled logic memory array is provided. A first differential stage includes a pair of emitter-coupled transistors connected to a current source controlled by a chip select voltage. A first one of the emitter-coupled transistors has its base connected to a first reference voltage and the second one of said transistors has its base coupled to a write enable input. The collector of a first one of the emitter-coupled transistors serves as a current source for a second differential stage including a second pair of emitter-coupled transistors, a first one having its base connected to a second reference voltage and the second having its base coupled to a data input conductor. The two respective outputs of the second differential stage are coupled to emitter follower drivers, and are also independently coupled through a pair of respective diode-connected transistors to the collector of the first transistor of the first emitter coupled pair.