Patents by Inventor John R. Reysa

John R. Reysa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10769334
    Abstract: A method, computer program product, and a fail recognition apparatus are disclosed for debugging one or more simulation fails in processor design verification that in one or more embodiments includes determining whether a prediction model exists; retrieving, in response to determining the prediction model exists, the prediction model; predicting one or more bug labels using the prediction model; determining whether a fix is available for the one or more predicted bug labels; and simulating, in response to determining the fix is available for the one or more predicted bug labels, the fix for the one or more predicted bug labels.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: September 8, 2020
    Assignee: International Business Machines Corporation
    Inventors: Bryan G. Hickerson, Mohamed Baker Alawieh, Brian L. Kozitza, John R. Reysa, Erica Stuecheli
  • Publication number: 20200159872
    Abstract: A method, computer program product, and a fail recognition apparatus are disclosed for debugging one or more simulation fails in processor design verification that in one or more embodiments includes determining whether a prediction model exists; retrieving, in response to determining the prediction model exists, the prediction model; predicting one or more bug labels using the prediction model; determining whether a fix is available for the one or more predicted bug labels; and simulating, in response to determining the fix is available for the one or more predicted bug labels, the fix for the one or more predicted bug labels.
    Type: Application
    Filed: November 16, 2018
    Publication date: May 21, 2020
    Inventors: Bryan G. Hickerson, Mohamed Baker Alawieh, Brian L. Kozitza, John R. Reysa, Erica Stuecheli
  • Publication number: 20090006066
    Abstract: A system for selecting a test case. A test case with a high score is selected. A simulation job is run on a device under test on a plurality of processors using the selected test case. Simulation performance and coverage data is collected for the selected test case and the collected simulation performance and coverage data is stored in a database.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Inventors: Michael L. Behm, Steven R. Farago, Brian L. Kozitza, John R. Reysa
  • Publication number: 20080052712
    Abstract: A method and system for selecting optimal clusters for batch job submissions is provided. The method includes receiving a job request for a class and determining a number of jobs waiting in a queue for the class at each of a group of batch clusters. The method also includes determining a number of job slots for each job class within each of the group of batch clusters. The method further includes calculating a ratio of the number of jobs waiting and the number of job slots for each of the group of batch clusters, the ratio reflecting a wait time. The method also includes selecting a batch cluster from the group with the lowest ratio and dispatching the job request to the batch cluster with the lowest ratio, the lowest ratio reflecting a shortest wait time.
    Type: Application
    Filed: August 23, 2006
    Publication date: February 28, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Martin B. Gustafson, Craig L. Kuhlman, John R. Reysa