Patents by Inventor John R. Zedlewski

John R. Zedlewski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10417048
    Abstract: A thread scheduling mechanism is provided that flexibly enforces performance isolation of multiple threads to alleviate the effect of anti-cooperative execution behavior with respect to a shared resource, for example, hoarding a cache or pipeline, using the hardware capabilities of simultaneous multi-threaded (SMT) or multi-core processors. Given a plurality of threads running on at least two processors in at least one functional processor group, the occurrence of a rescheduling condition indicating anti-cooperative execution behavior is sensed, and, if present, at least one of the threads is rescheduled such that the first and second threads no longer execute in the same functional processor group at the same time.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: September 17, 2019
    Assignee: VMware, Inc.
    Inventors: John R. Zedlewski, Carl A. Waldspurger
  • Patent number: 8667500
    Abstract: Processes are balanced among multiple computer systems. The allocation policies and resource demands of multiple processes executing on multiple computer systems are used to determine the resource imbalance of the computer systems. Resource imbalance can be used to determine whether a process should be migrated from one computer system to another. Resource imbalance of multiple resources can be combined to determine overall imbalance of the computer systems. Overall imbalance can be used to determine whether a process should be migrated from one computer system to another. Imbalance of resources can be determined for resources such as processor time, memory, network bandwidth, and storage. Virtual machines can be balanced among multiple computer systems operating in a cluster.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: March 4, 2014
    Assignee: VMware, Inc.
    Inventors: Minwen Ji, Carl A. Waldspurger, John R. Zedlewski
  • Publication number: 20120227042
    Abstract: A thread scheduling mechanism is provided that flexibly enforces performance isolation of multiple threads to alleviate the effect of anti-cooperative execution behavior with respect to a shared resource, for example, hoarding a cache or pipeline, using the hardware capabilities of simultaneous multi-threaded (SMT) or multi-core processors. Given a plurality of threads running on at least two processors in at least one functional processor group, the occurrence of a rescheduling condition indicating anti-cooperative execution behavior is sensed, and, if present, at least one of the threads is rescheduled such that the first and second threads no longer execute in the same functional processor group at the same time.
    Type: Application
    Filed: May 16, 2012
    Publication date: September 6, 2012
    Applicant: VMware, Inc.
    Inventors: John R. ZEDLEWSKI, Carl A. WALDSPURGER
  • Patent number: 7984304
    Abstract: Computer-executable instructions in a computer are verified dynamically, after they have been identified for submission for execution, but before they are actually executed. In particular, for at least one current instruction that has been identified for submission to the processor for execution, an identifying value, for example, a hash value, is determined for a current memory block that contains the current instruction. The identifying value of the current memory block is then compared with a set of reference values. If the identifying value satisfies a validation condition, then execution of the current instruction by the processor is allowed. If the validation condition is not satisfied, then a response is generated: In the common case, execution of the current instruction is not allowed, or some other predetermined measure is taken.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: July 19, 2011
    Assignee: VMware, Inc.
    Inventors: Carl A. Waldspurger, Ole Agesen, Xiaoxin Chen, John R. Zedlewski, Tal Garfinkel
  • Publication number: 20100205602
    Abstract: A thread scheduling mechanism is provided that flexibly enforces performance isolation of multiple threads to alleviate the effect of anti-cooperative execution behavior with respect to a shared resource, for example, hoarding a cache or pipeline, using the hardware capabilities of simultaneous multi-threaded (SMT) or multi-core processors. Given a plurality of threads running on at least two processors in at least one functional processor group, the occurrence of a rescheduling condition indicating anti-cooperative execution behavior is sensed, and, if present, at least one of the threads is rescheduled such that the first and second threads no longer execute in the same functional processor group at the same time.
    Type: Application
    Filed: April 26, 2010
    Publication date: August 12, 2010
    Applicant: VMWARE, INC.
    Inventors: John R. ZEDLEWSKI, Carl A. WALDSPURGER
  • Patent number: 7707578
    Abstract: A thread scheduling mechanism is provided that flexibly enforces performance isolation of multiple threads to alleviate the effect of anti-cooperative execution behavior with respect to a shared resource, for example, hoarding a cache or pipeline, using the hardware capabilities of simultaneous multi-threaded (SMT) or multi-core processors. Given a plurality of threads running on at least two processors in at least one functional processor group, the occurrence of a rescheduling condition indicating anti-cooperative execution behavior is sensed, and, if present, at least one of the threads is rescheduled such that the first and second threads no longer execute in the same functional processor group at the same time.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: April 27, 2010
    Assignee: VMware, Inc.
    Inventors: John R. Zedlewski, Carl A. Waldspurger