Patents by Inventor John Ries
John Ries has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240095820Abstract: Apparatuses, systems, methods, and computer program products are disclosed for externally held account discovery and aggregation. A method includes aggregating transactions of a first service provider from one or more servers to a trusted hardware device. A method includes identifying, on a trusted hardware device, one or more transactions of a first service provider between an account of a user with the first service provider and an account of the user with a second service provider. A method includes prompting a user for electronic credentials for an account of the user with a second service provider. A method includes accessing data of a user from a second service provider on behalf of the user using electronic credentials.Type: ApplicationFiled: November 24, 2023Publication date: March 21, 2024Applicant: MX Technologies, Inc.Inventors: Daniel Ries, John Ryan Caldwell
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Patent number: 9795937Abstract: A fluid holding structure fluid circulating system includes a fluid movement assembly with a propeller including a housing having a perimeter wall and a plurality of blades attached to an outer surface of the perimeter wall. A motor is mechanically coupled to the propeller and is positioned above the propeller. A buoy has buoyancy in fluid great enough to raise the fluid movement assembly adjacent to a surface of a fluid holding structure when the motor is turned off. The motor is mounted within the buoy and the propeller urges fluid upwardly toward the buoy when the motor is turned on to rotate the propeller. The propeller is completely exposed around its lateral periphery. A positioning cable is attached to the fluid movement assembly to facilitate movement thereof within the fluid holding structure.Type: GrantFiled: March 20, 2014Date of Patent: October 24, 2017Inventor: John Ries
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Patent number: 9727668Abstract: Aspects of the present invention are directed to improving the speed of event-driven simulation by manipulating delta delays in a system model to reduce delta cycle executions. The manipulation is performed in a manner that preserves delta cycle accurate timing on selected signals of the system, which may be of interest to a designer. Methods and systems are provided for identifying the signals of interest, and for determining portions of the design that may have delta delays retimed. Preserving the timing on the signals of interest ensures that race conditions and glitches present in the design on the signals of interest are still viewable by the designer. To reduce simulation time, delta delays may be moved from high activity signals to low activity signals, the total number of delta delays may be reduced, or a number of processes executed may be reduced.Type: GrantFiled: December 31, 2012Date of Patent: August 8, 2017Assignee: Mentor Graphics CorporationInventors: Sachin Kakkar, John Ries
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Patent number: 9630156Abstract: A fluid holding structure fluid circulating system includes a fluid movement assembly for urging fluid upwardly towards a surface of the fluid holding structure. The fluid movement assembly includes a frame that is positionable on a floor of a fluid holding structure. The frame includes a lower section and an upper section. A motor is mounted to the upper section of the frame and a propeller is mounted on the motor such that the propeller is above the frame. The propeller urges fluid upwardly away from the frame when the motor is turned on to rotate the propeller.Type: GrantFiled: December 18, 2013Date of Patent: April 25, 2017Inventor: John Ries
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Patent number: 9281233Abstract: A method of preparing a monocrystalline donor substrate, the method comprising (a) implanting helium ions through the front surface of the monocrystalline donor substrate to an average depth D1 as measured from the front surface toward the central plane; (b) implanting hydrogen ions through the front surface of the monocrystalline donor substrate to an average depth D2 as measured from the front surface toward the central plane; and (c) annealing the monocrystalline donor substrate at a temperature sufficient to form a cleave plane in the monocrystalline donor substrate. The average depth D1 and the average depth D2 are within about 1000 angstroms.Type: GrantFiled: December 19, 2013Date of Patent: March 8, 2016Assignee: SunEdison Semiconductor LimitedInventors: Jeffrey L. Libbert, Michael John Ries
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Publication number: 20150165401Abstract: A fluid holding structure fluid circulating system includes a fluid movement assembly with a propeller including a housing having a perimeter wall and a plurality of blades attached to an outer surface of the perimeter wall. A motor is mechanically coupled to the propeller and is positioned above the propeller. A buoy has buoyancy in fluid great enough to raise the fluid movement assembly adjacent to a surface of a fluid holding structure when the motor is turned off. The motor is mounted within the buoy and the propeller urges fluid upwardly toward the buoy when the motor is turned on to rotate the propeller. The propeller is completely exposed around its lateral periphery. A positioning cable is attached to the fluid movement assembly to facilitate movement thereof within the fluid holding structure.Type: ApplicationFiled: March 20, 2014Publication date: June 18, 2015Inventor: John Ries
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Patent number: 8845859Abstract: Systems and methods are provided for mechanically cleaving a bonded wafer pair by controlling the rate of cleaving. This controlled rate of cleaving results in a reduction or elimination of non-uniform thickness variations in the cleaved surface of the resulting SOI wafer. One embodiment uses flexible chucks attached to the faces of the wafers and actuators attached to the flexible chucks to cleave the bonded wafer pair. Other embodiments also use rollers in contact with the surfaces to control the rate of cleaving.Type: GrantFiled: March 12, 2012Date of Patent: September 30, 2014Assignee: SunEdison Semiconductor Limited (UEN201334164H)Inventors: Michael John Ries, Jeffrey L. Libbert, Dale A. Witte
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Publication number: 20140187020Abstract: A method of preparing a monocrystalline donor substrate, the method comprising (a) implanting helium ions through the front surface of the monocrystalline donor substrate to an average depth D1 as measured from the front surface toward the central plane; (b) implanting hydrogen ions through the front surface of the monocrystalline donor substrate to an average depth D2 as measured from the front surface toward the central plane; and (c) annealing the monocrystalline donor substrate at a temperature sufficient to form a cleave plane in the monocrystalline donor substrate. The average depth D1 and the average depth D2 are within about 1000 angstroms.Type: ApplicationFiled: December 19, 2013Publication date: July 3, 2014Inventors: Jeffrey L. Libbert, Michael John Ries
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Publication number: 20130062020Abstract: Systems and methods are provided for mechanically cleaving a bonded wafer pair by controlling the rate of cleaving. This controlled rate of cleaving results in a reduction or elimination of non-uniform thickness variations in the cleaved surface of the resulting SOI wafer. One embodiment uses flexible chucks attached to the faces of the wafers and actuators attached to the flexible chucks to cleave the bonded wafer pair. Other embodiments also use rollers in contact with the surfaces to control the rate of cleaving.Type: ApplicationFiled: March 12, 2012Publication date: March 14, 2013Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: Michael John Ries, Jeffrey L. Libbert, Dale A. Witte
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Patent number: 8346529Abstract: Aspects of the present invention are directed to improving the speed of event-driven simulation by manipulating delta delays in a system model to reduce delta cycle executions. The manipulation is performed in a manner that preserves delta cycle accurate timing on selected signals of the system, which may be of interest to a designer. Methods and systems are provided for identifying the signals of interest, and for determining portions of the design that may have delta delays retimed. Preserving the timing on the signals of interest ensures that race conditions and glitches present in the design on the signals of interest are still viewable by the designer. To reduce simulation time, delta delays may be moved from high activity signals to low activity signals, the total number of delta delays may be reduced, or a number of processes executed may be reduced.Type: GrantFiled: December 29, 2009Date of Patent: January 1, 2013Assignee: Mentor Graphics CorporationInventors: Sachin Kakkar, John Ries
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Publication number: 20110161066Abstract: Aspects of the present invention are directed to improving the speed of event-driven simulation by manipulating delta delays in a system model to reduce delta cycle executions. The manipulation is performed in a manner that preserves delta cycle accurate timing on selected signals of the system, which may be of interest to a designer. Methods and systems are provided for identifying the signals of interest, and for determining portions of the design that may have delta delays retimed. Preserving the timing on the signals of interest ensures that race conditions and glitches present in the design on the signals of interest are still viewable by the designer. To reduce simulation time, delta delays may be moved from high activity signals to low activity signals, the total number of delta delays may be reduced, or a number of processes executed may be reduced.Type: ApplicationFiled: December 29, 2009Publication date: June 30, 2011Applicant: MENTOR GRAPHICS CORPORATIONInventors: Sachin Kakkar, John Ries
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Patent number: 6339016Abstract: An apparatus and method are provided for forming a denuded zone and an epitaxial layer on a semiconductor wafer used in manufacturing electronic components. The denuded zone and epitaxial layer are formed in one chamber. The apparatus includes a plurality of upstanding pins immovably mounted on a susceptor and maintain a semiconductor wafer spaced from the susceptor during both application of the epitaxial layer and formation of the denuded zone. Fast cooling of the wafer is accomplished by having the wafer out of conductive heat transfer relation with the susceptor during cooling thereof.Type: GrantFiled: June 30, 2000Date of Patent: January 15, 2002Assignee: MEMC Electronic Materials, Inc.Inventors: Tom Torack, Michael John Ries