Abstract: A multiple access wireless communications architecture provides selective, simultaneous communications with wireless devices located in different sections of a spatial area around a communications apparatus referred to as “sectors”. This includes communications between wireless devices in a single sector, between wireless devices in different sectors and between wireless devices and a wired network or wireless backhaul network. The wireless communications architecture generally includes two or more wireless antenna arrangements that are each configured to provide communications with wireless devices located in a particular sector. Each wireless antenna arrangement is further configured to determine whether signals are being communicated on a communications channel before transmitting on the communications channel. This may be implemented, for example, using a carrier sense or energy detection mechanism.

Abstract: A multiple access wireless communications architecture provides selective, simultaneous communications with wireless devices located in different sections of a spatial area around a communications apparatus referred to as “sectors”. This includes communications between wireless devices in a single sector, between wireless devices in different sectors and between wireless devices and a wired network or wireless backhaul network. The wireless communications architecture generally includes two or more wireless antenna arrangements that are each configured to provide communications with wireless devices located in a particular sector. Each wireless antenna arrangement is further configured to determine whether signals are being communicated on a communications channel before transmitting on the communications channel. This may be implemented, for example, using a carrier sense or energy detection mechanism.

Abstract: The invention provides a method for generating a code sequence. A code-generation instruction is received from memory. One or more control signals are determined based on the code-generation instruction. A code sequence is generated based on the control signals, a current state input, and a mask input.

Abstract: The invention provides a method for generating a code sequence. A code-generation instruction is received from memory. One or more control signals are determined based on the code-generation instruction. A code sequence is generated based on the control signals, a current state input, and a mask input.

Abstract: A converter continuously converts an input signal (110) to an output signal (112) even during correction and compensation. A primary converter (124) converts the signal along a forward primary path (104). A feedback converter (140) along a feedback path (106) outputs a feedback signal (116). A reference device (136) employs reference indicator (134) to provide a digital reference signal (135). A selection device (132) passes the digital reference signal (135) to an element (204) of the feedback converter (140) for outputting reference portion (208) of the feedback signal (116). The passing of the digital reference signal (135) to the element (204) is contemporaneous with the converting of the input signal (110) to the output signal (112). The evaluator (142) determines a conversion characteristic of the element (204) by employing a characteristic of the reference indicator (134).

Abstract: An apparatus and method of filtering at least one set of data comprises determining a subset of Q data elements of a set of L data elements (12), and determining a filtered value based upon the subset of Q data elements (14). Each of the subset of Q data elements is greater than at most a first predetermined number of the L data elements and greater than or equal to at least a second predetermined number of the L data elements other than itself.

Abstract: An unbuffered flip-flop includes feedback control circuitry providing adaptive control of the internal node during the transfer and latching phases of the flip-flop to prevent back-writing. A complementary pair of transmission gates controlled by the output node are included in the feedback path between an output buffer and a feedback buffer. As noise voltage variations and spikes alter the voltage on the output node, the charge transmittance of the transmission gates is weakened or shut off, thereby preventing the incorrect logic state from being driven by the feedback buffer through to the input of the flip-flop's output buffer and causing back writing. Because the transmission gate transistors are complementary, one transistor or the other will be operating in a transmissive state for each of the bi-stable states of the output buffer during static operation of the flip-flop.