Patents by Inventor John Robert Diroll

John Robert Diroll has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor die packages using thin dies and metal substrates
    Patent number: 8329508
    Abstract: A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: December 11, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Hamza Yilmaz, Steven Sapp, Qi Wang, Minhua Li, James J. Murphy, John Robert Diroll
  • SEMICONDUCTOR DIE PACKAGES USING THIN DIES AND METAL SUBSTRATES
    Publication number: 20100267200
    Abstract: A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.
    Type: Application
    Filed: June 25, 2010
    Publication date: October 21, 2010
    Inventors: Hamza Yilmaz, Steven Sapp, Qi Wang, Minhua Li, James J. Murphy, John Robert Diroll
  • Semiconductor die packages using thin dies and metal substrates
    Patent number: 7768075
    Abstract: A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: August 3, 2010
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Hamza Yilmaz, Steven Sapp, Qi Wang, Minhua Li, James J. Murphy, John Robert Diroll