Abstract: An image sensor having a set of pixels making up the image sensor to capture an image. Two or more pixels in the set of pixels each have an architecture that includes multiple photodiodes configurable to form an individual pixel. A control system can cooperate with the multiple photodiodes to form the individual pixel. Each of the multiple photodiodes can have a transfer gate electrically coupled to that photodiode. A common region can hold or transfer charge at least during or after an integration time. A read gate electrically coupled to the common region and a sense node, can supply charge from the common region through the read gate to the sense node.

Abstract: Systems, Methods, and Apparatuses for an image sensor and a control system to cooperate with each photodiode in individual pixels to allow multiple pixels in a set of pixels to operate in a different imaging-mode of operation simultaneously within multiple window regions of the image. The image sensor has multiple window regions each capable of operating in different operating modes. Each pixel contains multiple photodiodes. The imager is fabricated with an additional semiconductor layer containing one or more metallization layers for interconnections and providing active CMOS circuits for control.

Abstract: An imaging system for capturing light over a wide dynamic range and method for operating the same are provided. In some aspects, the method includes positioning an imaging pixel to image a scene described by light signals that extend over a wide dynamic range, and selecting a different integration time for at least two photodiodes in the imaging pixel based on light signals received by the imaging pixel, wherein the photodiodes are coupled to a sense node, and each photodiode is controlled using a different transfer gate. The method also includes performing a readout of the imaging pixel using a readout circuit connected to the sense node, wherein a capacitance associated with the sense node is modified during the readout of the at least two photodiodes.

Abstract: An imaging system for capturing light over a wide dynamic range and method for operating the same are provided. In some aspects, the method includes positioning an imaging pixel to image a scene described by light signals that extend over a wide dynamic range, and selecting a different integration time for at least two photodiodes in the imaging pixel based on light signals received by the imaging pixel, wherein the photodiodes are coupled to a sense node, and each photodiode is controlled using a different transfer gate. The method also includes performing a readout of the imaging pixel using a readout circuit connected to the sense node, wherein a capacitance associated with the sense node is modified during the readout of the at least two photodiodes.

Abstract: Systems, Methods, and Apparatuses for an image sensor and a control system to cooperate with each photodiode in individual pixels to allow multiple pixels in a set of pixels to operate in a different imaging-mode of operation simultaneously within multiple window regions of the image. The image sensor has multiple window regions each capable of operating in different operating modes. Each pixel contains multiple photodiodes. The imager is fabricated with an additional semiconductor layer containing one or more metallization layers for interconnections and providing active CMOS circuits for control.

Abstract: An imaging system for capturing light over a wide dynamic range and method for operating the same are provided. In some aspects, the method includes positioning an imaging pixel to image a scene described by light signals that extend over a wide dynamic range, and selecting a different integration time for at least two photodiodes in the imaging pixel based on light signals received by the imaging pixel, wherein the photodiodes are coupled to a sense node, and each photodiode is controlled using a different transfer gate. The method also includes performing a readout of the imaging pixel using a readout circuit connected to the sense node, wherein a capacitance associated with the sense node is modified during the readout of the at least two photodiodes.

Abstract: An imager has an array of pixels arranged in rows and columns, readout circuitry electrically coupled to the columns to receive signals from the pixels, the readout circuitry having at least one signal path with gain switching, and a threshold detector electrically coupled to the readout circuitry to set a gain to be applied by the readout circuitry.

Abstract: The present invention provides a method and a system for high performance image signal processing of continuous images in real time. The system comprising a focal plane array for generating continuous source image frames in real time. The focal plane array divided logically into blocks of sub-frames. The system also comprising an analog to digital converter (ADC) layer having an array of ADC elements for converting the source image frames into a digital data. The system further comprising a digital processor layer having an array of processing elements for processing the digital data and an interconnecting layer for connecting each one of the ADC elements and the digital processing elements substantially vertically to the focal plane and substantially parallel to one another. The processing comprising reducing image motion blur, increasing image dynamic range, increasing image depth of field and obtaining features of the images.

Abstract: A method and apparatus for optimizing image quality based on scene content comprising a sensor for generating a sequence of frames where each frame in the sequence of frames comprises content representing a scene and a digital processor, coupled to the sensor, for performing scene content analysis and for establishing a window defining a number of input frames from the sensor and processed output frames, and for aligning and combining the number of frames in the window to form an output frame, wherein sensor parameters and frame combination parameters are adjusted based on scene content.

Abstract: An imager has an array of pixels arranged in rows and columns, readout circuitry electrically coupled to the columns to receive signals from the pixels, the readout circuitry having at least one signal path with gain switching, and a threshold detector electrically coupled to the readout circuitry to set a gain to be applied by the readout circuitry.

Abstract: A pixel design is disclosed. The pixel includes a photo-sensitive element. A first reflective layer substantially overlies the photo-sensitive element. A second reflective layer substantially underlies the photo-sensitive element and forms a cavity with the first reflective layer that is non-resonant with respect to photon absorption. An aperture is formed in either the first reflective layer or the second reflective layer. When electromagnetic radiation enters the aperture, the first reflective layer and the second reflective layer are configured to reflect the electromagnetic radiation substantially toward each other until substantially absorbed in the cavity.

Abstract: A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).

Abstract: A CMOS image sensor is disclosed. The CMOS image sensor includes a semiconductor substrate having a surface. An epitaxial layer is grown on the surface. A p-type CMOS pixel formed substantially in the epitaxial layer. In one version of the CMOS image sensor, there exists a net n-type dopant concentration profile in the semiconductor substrate and the epitaxial layer which has a maximum value at a predetermined distance from the surface and which decreases monotonically on both sides of the profile from the maximum value within the semiconductor substrate and the epitaxial layer. In another version of the CMOS image sensor, there exists a net n-type dopant concentration profile in the semiconductor substrate and the epitaxial layer which has a maximum value at the surface and which decreases monotonically with increasing distance from the surface within the semiconductor substrate and the epitaxial layer.

Abstract: A pixel design is disclosed. The pixel includes a photo-sensitive element. A first reflective layer substantially overlies the photo-sensitive element. A second reflective layer substantially underlies the photo-sensitive element and forms a cavity with the first reflective layer that is non-resonant with respect to photon absorption. An aperture is formed in either the first reflective layer or the second reflective layer. When electromagnetic radiation enters the aperture, the first reflective layer and the second reflective layer are configured to reflect the electromagnetic radiation substantially toward each other until substantially absorbed in the cavity.

Abstract: A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).

Abstract: A method and apparatus for equalizing gain in an array of electron multiplication (EM) pixels is disclosed, each pixel having one or more impact ionization gain stages with implants to achieve charge transfer directionality and comprising a phase 1 clocked gate, an EM clocked gate, and two DC gates formed between the phase 1 clocked gate and the EM clocked gate, comprising the steps of (a) applying initial voltages to each of the DC gates and the EM clocked gates of at least two pixels of a plurality of pixels; (b) clocking phase 1 clock gates and an EM clock gates associated with the at least two pixels of the plurality of pixels a predetermined number of times to achieve an average pixel intensity value after impact ionization gain; and (c) selectively adjusting the difference in voltage between the DC gate and corresponding EM clocked gate of the at least two pixels of the plurality of pixels until the difference between the resulting pixel intensity values and the average pixel intensity value needed to p

Abstract: A pixel for an imager is disclosed that includes at least one electron multiplication (EM) gain stage configured in a loop and electrically coupled to a charge collection region and a charge readout region, the charge collection region being configured to generate a charge packet, the EM gain stage being configured to amplify the charge packet by impact ionization and to circulate the charge packet a predetermined number of times in one direction around the loop, the charge readout region being configured to receive the amplified charge packet and convert the amplified charge to a measurable signal. The at least one EM gain stage, the charge collection region, and the charge readout region can be formed monolithically in an integrated circuit. The pixel can be manufactured using a CMOS process. The pixel can further include a second EM gain stage formed in the integrated circuit to increase the amount of amplification around the loop.

Abstract: A method and apparatus for equalizing gain in an array of electron multiplication (EM) pixels is disclosed, each pixel having one or more impact ionization gain stages with implants to achieve charge transfer directionality and comprising a phase 1 clocked gate, an EM clocked gate, and two DC gates formed between the phase 1 clocked gate and the EM clocked gate, comprising the steps of (a) applying initial voltages to each of the DC gates and the EM clocked gates of at least two pixels of a plurality of pixels; (b) clocking phase 1 clock gates and an EM clock gates associated with the at least two pixels of the plurality of pixels a predetermined number of times to achieve an average pixel intensity value after impact ionization gain; and (c) selectively adjusting the difference in voltage between the DC gate and corresponding EM clocked gate of the at least two pixels of the plurality of pixels until the difference between the resulting pixel intensity values and the average pixel intensity value needed to p

Abstract: A pixel for an imager is disclosed that includes at least one electron multiplication (EM) gain stage configured in a loop and electrically coupled to a charge collection region and a charge readout region, the charge collection region being configured to generate a charge packet, the EM gain stage being configured to amplify the charge packet by impact ionization and to circulate the charge packet a predetermined number of times in one direction around the loop, the charge readout region being configured to receive the amplified charge packet and convert the amplified charge to a measurable signal. The at least one EM gain stage, the charge collection region, and the charge readout region can be formed monolithically in an integrated circuit. The pixel can be manufactured using a CMOS process. The pixel can further include a second EM gain stage formed in the integrated circuit to increase the amount of amplification around the loop.

Abstract: Methods and apparatus for imaging light are disclosed. Light is imaged by collecting light, converting the collected light into a electrical charge signal, multiplying the electrical charge signal to produce multiple electrical charge signals with associated levels of gain, converting the electrical charge signals to voltage signals, and developing an output signal from one or more of the voltage signals that represents the collected light. The electrical charge signal may be multiplied using an electron multiplication device associated with multiple taps to produce the electrical charge signal with different levels of gain.