Abstract: A scheme for securing a locally generated data on a system using authenticated write operations is disclosed. According to an embodiment of the present invention, a private/public key pair is randomized and repeatedly generated to protect operations to data blocks.

Abstract: Subject matter disclosed herein relates to memory devices and security of same.

Abstract: Subject matter disclosed herein relates to validating memory content in persistent main memory of a processor.

Abstract: Subject matter disclosed herein relates to a system of one or more processors that includes persistent memory.

Abstract: Subject matter disclosed herein relates to cache coherence of a processor system that includes persistent memory.

Abstract: A method for writing to and erasing a non-volatile memory is described. The method includes determining the size of a command window for use in n write operations for the non-volatile memory, each write operation having the same time period. A long latency erase command is sliced by a factor of n to provide a plurality of erase slices, each erase slice having the same time period. The method further includes executing n commands to the non-volatile memory, each command composed of the combination of one of the n write operations and one of the erase slices. The total of the time period of one erase slice added to the time period of one write operation is less than or equal to the size of the command window.

Abstract: A method for writing to and erasing a non-volatile memory is described. The method includes determining the size of a command window for use in n write operations for the non-volatile memory, each write operation having the same time period. A long latency erase command is sliced by a factor of n to provide a plurality of erase slices, each erase slice having the same time period. The method further includes executing n commands to the non-volatile memory, each command composed of the combination of one of the n write operations and one of the erase slices. The total of the time period of one erase slice added to the time period of one write operation is less than or equal to the size of the command window.

Abstract: A memory profiling system profiles memory objects in volatile memory and identifies memory objects as candidates to be stored and read directly from nonvolatile memory. The profiling system monitors memory accesses via page faults and identifies a memory object to be loaded in volatile memory. The profiling system uses page faults to determine a page fault type and a write frequency for the memory object, and determines the memory object's memory access type. The profiling system determines whether the object's memory access type meets the capabilities of the nonvolatile memory technology. If the memory access type meets the nonvolatile memory technology capabilities, the profiling system identifies the memory object as a candidate to be transitioned to and read directly from nonvolatile memory (e.g., NOR and PCM). The profiling system stores the memory object candidates in nonvolatile memory such that the memory objects are read directly from nonvolatile memory.

Abstract: A method that may be used in a no bit-twiddling file system of a non-volatile memory. The method comprises writing to a non-volatile memory a data sector of a file system, and writing to the non-volatile memory of a control sector that comprises a first seed at a start of the control sector, a pointer to the data sector and a second seed at an end of the control sector. The method further comprises updating a link structure table entry associated with the control sector.

Abstract: A technique to update a memory block without status logging is presented. An update file includes a pre-update and a post-update information verification code (IVC) for each block to be updated. By comparing the IVCs to an IVC of a block of memory, an update status may be determined.

Abstract: Erase cycle counting may be used for a non-volatile memory to balance the cycles on memory blocks or partitions. In some embodiments, the non-volatile memory may include two memory locations such as wordlines associated with each block of memory. The wordlines may be alternately erased so that an updated cycle count is transferred from the wordlines to the other. In the case of a power loss in the course of the updating of the cycle count, a method may detect that the data is in improper states and require that the erase be restarted after the power loss in order to recover the correct erase cycle count.

Abstract: Erase cycle counting may be used for a non-volatile memory to balance the cycles on memory blocks or partitions. In some embodiments, the non-volatile memory may include two memory locations such as wordlines associated with each block of memory. The wordlines may be alternately erased so that an updated cycle count is transferred from the wordlines to the other. In the case of a power loss in the course of the updating of the cycle count, a method may detect that the data is in improper states and require that the erase be restarted after the power loss in order to recover the correct erase cycle count.

Abstract: A technique to update a memory block without status logging is presented. An update file includes a pre-update and a post-update information verification code (IVC) for each block to be updated. By comparing the IVCs to an IVC of a block of memory, an update status may be determined.

Abstract: Briefly, a method, apparatus and system for storing data in a memory array according to an update characteristic of the data is disclosed. By storing data according to, for example, a frequency of update, writes to memory may be more efficient.

Abstract: Storing an application onto a system includes receiving the application, determining specifications of the system, and reorganizing the application in accordance with the specifications of the system so as to improve execution of the application. The reorganized application is stored on the system.

Abstract: Embodiments of methods and apparatus for providing a read access control system associated with a flash device are generally described herein. Other embodiments may be described and claimed.

Abstract: An apparatus, system, method, and article for protecting nonvolatile memory from viruses are described. The apparatus may include a nonvolatile memory comprising one or more protected storage areas. The nonvolatile memory may be arranged to transform buffered information to be programmed in the protected areas and to program transformed information in the protected storage areas. Other embodiments are described and claimed.

Abstract: In various embodiments, boot code in a computer system may make itself inaccessible after completing its boot operations, thus preventing it from being modified by unauthorized code subsequent to the boot operation. In some embodiments, this inaccessibility may make itself unreadable, so that it cannot be read and analyzed by unauthorized code. One or more specific startup triggers, such as a system reset, may make the boot code accessible again so that it can perform its boot operations before making itself inaccessible again.

Abstract: A method and apparatus for providing execution resources in a flash device is described herein. In a first mode, a write buffer in the flash device is used as a general purpose memory, i.e. a processing element, such as a host microprocessor uses the write buffer as an execution/variable space. In the first mode the write buffer is mapped as part of the flash address map, which is visible to the processing element for reading and writing. In a second mode, the write buffer acts as a buffer to write data into an array in the flash, as in normal operation. A selection/toggle module is used to select/toggle between the first and second modes. The selection or toggle may be based on commands, instructions, interrupts, user-initiated events, system-initiated events, or any combination thereof.

Abstract: Method and apparatus for multi-block update using secure flash memory. An update package is received at a device containing update code to update existing code for the device stored in non-volatile memory. The received update code is stored in a first portion of the non-volatile memory, while pointers identifying storage locations of respective sets of the update code are written to a second portion of the non-volatile memory device. An update process is then performed with the update code by using the pointers to locate the respective sets and assembling the update code. Updated firmware and software images are then written to the non-volatile memory device to complete the update.