Patents by Inventor John S Atkinson

John S Atkinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and methods for ensuring correct connectivity between circuit designs
    Patent number: 7039892
    Abstract: Systems, methods and software products ensure correct connectivity between circuit designs. A list of connections of the circuit designs is generated. One or more mapping files are generated from the list to correlate connections between the circuit designs. The mapping file is regenerated in response to modification of at least one of the circuit designs.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: May 2, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paul John Mantey, John S. Atkinson, Michael John Erickson
  • System for ensuring correct pin assignments between system board connections using common mapping files
    Patent number: 6898775
    Abstract: The system of the invention ensures pin assignments between system board connections of printed circuit boards. A plurality of software configuration files define connections of a plurality of printed circuit boards. A mapping file correlates pin assignment attributes between the software configuration files. A processing section processes the configuration files and the mapping file to generate board schematics for the plurality of printed circuit boards with common pin assignment for the connections of each of the printed circuit boards. The software configuration files may include symbol files representing parts within the plurality of printed circuit boards. The software configuration files may include geometry files representing physical attributes of the parts. Changes to the design are automatically correlated to pin assignments through the boards and layout.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: May 24, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael John Erickson, Paul J. Mantey, John S Atkinson
  • Systems and methods for ensuring correct connectivity between circuit designs
    Publication number: 20040034842
    Abstract: Systems, methods and software products ensure correct connectivity between circuit designs. A list of connections of the circuit designs is generated. One or more mapping files are generated from the list to correlate connections between the circuit designs. The mapping file is regenerated in response to modification of at least one of the circuit designs.
    Type: Application
    Filed: August 19, 2003
    Publication date: February 19, 2004
    Inventors: Paul John Mantey, John S. Atkinson, Michael John Erickson
  • Method for ensuring correct pin assignments between system board connections using common mapping files
    Publication number: 20040031012
    Abstract: The system of the invention ensures pin assignments between system board connections of printed circuit boards. A plurality of software configuration files define connections of a plurality of printed circuit boards. A mapping file correlates pin assignment attributes between the software configuration files. A processing section processes the configuration files and the mapping file to generate board schematics for the plurality of printed circuit boards with common pin assignment for the connections of each of the printed circuit boards. The software configuration files may include symbol files representing parts within the plurality of printed circuit boards. The software configuration files may include geometry files representing physical attributes of the parts. Changes to the design are automatically correlated to pin assignments through the boards and layout.
    Type: Application
    Filed: August 7, 2003
    Publication date: February 12, 2004
    Inventors: Michael John Erickson, Paul J. Mantey, John S. Atkinson
  • Method for ensuring correct pin assignments between system board connections using common mapping files
    Patent number: 6629307
    Abstract: The system of the invention ensures pin assignments between system board connections of printed circuit boards. A plurality of software configuration files define connections of a plurality of printed circuit boards. A mapping file correlates pin assignment attributes between the software configuration files. A processing section processes the configuration files and the mapping file to generate board schematics for the plurality of printed circuit boards with common pin assignment for the connections of each of the printed circuit boards. The software configuration files may include symbol files representing parts within the plurality of printed circuit boards. The software configuration files may include geometry files representing physical attributes of the parts. Changes to the design are automatically correlated to pin assignments through the boards and layout.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: September 30, 2003
    Assignee: Hewlett-Packard Development Company, LP.
    Inventors: Michael John Erickson, Paul J. Mantey, John S Atkinson
  • Method for high-density, low-via-count, decoupling capacitor placement
    Patent number: 6618266
    Abstract: A capacitor mounting method and resulting printed circuit board that increases the mounting density of both vias and decoupling capacitors is presented. Vias are shared between capacitors mounted on the top and bottom of the printed circuit board. This arrangement allows increased decoupling capacitor density and avoids the current doubling problem when shared vias are connected with capacitors installed on the same side of the board.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: September 9, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Robert J. Blakely, John S. Atkinson
  • Method for ensuring correct pin assignments between system board connections using common mapping files
    Publication number: 20030023944
    Abstract: The system of the invention ensures pin assignments between system board connections of printed circuit boards. A plurality of software configuration files define connections of a plurality of printed circuit boards. A mapping file correlates pin assignment attributes between the software configuration files. A processing section processes the configuration files and the mapping file to generate board schematics for the plurality of printed circuit boards with common pin assignment for the connections of each of the printed circuit boards. The software configuration files may include symbol files representing parts within the plurality of printed circuit boards. The software configuration files may include geometry files representing physical attributes of the parts. Changes to the design are automatically correlated to pin assignments through the boards and layout.
    Type: Application
    Filed: July 24, 2001
    Publication date: January 30, 2003
    Inventors: Michael John Erickson, Paul J. Mantey, John S. Atkinson
  • Method for high-density, low-via-count, decoupling capacitor placement
    Publication number: 20020172023
    Abstract: A capacitor mounting method and resulting printed circuit board that increases the mounting density of both vias and decoupling capacitors is presented. Vias are shared between capacitors mounted on the top and bottom of the printed circuit board. This arrangement allows increased decoupling capacitor density and avoids the current doubling problem when shared vias are connected with capacitors installed on the same side of the board.
    Type: Application
    Filed: March 6, 2001
    Publication date: November 21, 2002
    Inventors: Robert J. Blakely, John S. Atkinson